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soc/riscv/sifive-freedom/fe310: use correct SYS_CLOCK_HW_CYCLES_PER_SEC

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This commit introduces changes in three places in order to fix the
problem with timer-related tests on FE310-based boards:
* tests/kernel/sleep/kernel.common.timing
* tests/kernel/tickless/tickless_concept/kernel.tickless.concept
* tests/kernel/workq/work_queue/kernel.workqueue

The first change is the modification of the SYS_CLOCK_HW_CYCLES_PER_SEC
value back to 32768 Hz to match FE310's datasheet description.

The second change is CLINT frequency reduction in Renode simulation
model to 16 MHz to correspond with the oscillator frequency given by the
FE310's datasheet and the HiFive1 board schematic. This fixes the first
two tests.

The last change is reducing the MIN_DELAY define to 100. This causes the
RISC-V machine timer driver to update the mtimecmp register more often,
which in turn addresses the `work_queue/kernel.workqueue` problem with
work items finishing prematurely, causing the above-mentioned test to
fail.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit is contained in:
Filip Kokosinski 2022-05-10 08:25:44 +02:00 • committed by Marti Bolivar
commit 70c978bb97
4 changed files with 19 additions and 3 deletions
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8
drivers/timer/Kconfig.riscv_machine
View file

@ -28,3 +28,11 @@ config RISCV_MACHINE_TIMER_SYSTEM_CLOCK_DIVIDER
The division ratio should define in devicetree,
and it is desirable usage that references it with using a function such as
dt_node_int_prop_int from Kconfig. (Tune in the conf file is not preferable.)
config RISCV_MACHINE_TIMER_MIN_DELAY
int
default 100
help
Specifies the minimum number of machine cycles before the RISC-V machine
time compare register is allowed to be updated by the RISC-V machine timer
driver.

2
drivers/timer/riscv_machine_timer.c
View file

@ -14,7 +14,7 @@
/ (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC))
#define MAX_CYC INT_MAX
#define MAX_TICKS ((MAX_CYC - CYC_PER_TICK) / CYC_PER_TICK)
#define MIN_DELAY 1000
#define MIN_DELAY CONFIG_RISCV_MACHINE_TIMER_MIN_DELAY
#define TICKLESS IS_ENABLED(CONFIG_TICKLESS_KERNEL)