boards: arm: add support for lpcxpresso11u68 board

This patch adds support for the LPC11U68 LPCXpresso board based on the
LPC11U68 SoC.

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
This commit is contained in:
Maxime Bittan 2020-03-18 19:04:43 +01:00 committed by Carles Cufí
commit 70a277575a
11 changed files with 400 additions and 0 deletions

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# SPDX-License-Identifier: Apache-2.0
set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
# Insert checksum (verified by the bootloader) into the zephyr.bin
# and zephyr.hex images.
COMMAND lpc_checksum -f hex ${CMAKE_BINARY_DIR}/zephyr/zephyr.hex
COMMAND lpc_checksum -f bin ${CMAKE_BINARY_DIR}/zephyr/zephyr.bin
)

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# LPCXpresso11U68 board
# Copyright (c) 2020, Seagate
# SPDX-License-Identifier: Apache-2.0
config BOARD_LPCXPRESSO11U68
bool "NXP LPCXPRESSO-11U68"
depends on SOC_SERIES_LPC11U6X
select SOC_PART_NUMBER_LPC11U68JBD100

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# LPCXpresso11U68 board
# Copyright (c) 2020, Seagate
# SPDX-License-Identifier: Apache-2.0
if BOARD_LPCXPRESSO11U68
config BOARD
default "lpcxpresso11u68"
endif # BOARD_LPCXPRESSO11U68

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#
# SPDX-License-Identifier: Apache-2.0
#
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

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.. _lpcxpresso11u68:
NXP LPCXpresso11U68
###################
Overview
********
The LPCXpresso11u68 development board uses an NXP LPC11U68 MCU based
on an ARM Cortex-M0+ core.
.. figure:: lpcxpresso11u68.png
:width: 800px
:align: center
:alt: LPCXpresso11U68
Hardware
********
The LPCxpresso 11U68 board provides the following hardware components:
- LPC11U68 microcontroller in LQFP100 package
- ARM Cortex-M0+
- Memory:
- 256KB of flash memory
- 32KB of SRAM
- 2x2KB of additional SRAM
- 4 KB EEPROM
- USB:
- USB 2.0 Full-Speed device controller
- DMA controller
- 5x USART
- 2x I2C
- 2x SSP with DMA support
- Board power supply: through USB bus or external power supply (3V and 5V)
- Arduino connectors compatible with the 'Arduino UNO' platform
- Tri-color user LED, Power On Led, Reset LED
- Three push buttons: target reset, ISP and user
More information can be found here:
- `LPC11UXX SoC Website`_
- `LPC11U6X Datasheet`_
- `LPC11U6X Reference Manual`_
- `LPCXPRESSO11U68 Website`_
- `LPCXPRESSO11U68 Schematics`_
Supported Features
==================
The lpcxpresso11U68 supports the following features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| IOCON | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock and reset control |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c master/slave controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port interrupt |
+-----------+------------+-------------------------------------+
| EEPROM | on-chip | eeprom |
+-----------+------------+-------------------------------------+
Other hardware is not yet supported on Zephyr.
Connections and IOs
===================
The IOCON controller can be used to configure the LPC11U68 pins.
+---------+-----------------+----------------------------+
| Name | Function | Usage |
+=========+=================+============================+
| PIO2_11 | UART | USART RX |
+---------+-----------------+----------------------------+
| PIO2_12 | UART | USART TX |
+---------+-----------------+----------------------------+
| PIO2_16 | GPIO | GREEN LED |
+---------+-----------------+----------------------------+
| PIO2_17 | GPIO | RED LED |
+---------+-----------------+----------------------------+
| PIO2_18 | GPIO | BLUE_LED |
+---------+-----------------+----------------------------+
| PIO0_4 | I2C | I2C SCL |
+---------+-----------------+----------------------------+
| PIO0_5 | I2C | I2C SDA |
+---------+-----------------+----------------------------+
Programming and Debugging
*************************
Flashing
========
The LPCXpresso11U68 board can be flashed by using the on-board LPC-Link2 debug
probe (based on a NXP LPC43xx MCU). This MCU provides either a CMSIS-DAP or
a J-Link interface. It depends on the embedded firmware image. The default
OpenOCD configuration supports the the CMSIS-DAP interface. If you want to
switch to J-Link, then you need to edit the
``boards/arm/lpcxpresso11u68/support/openocd.cfg`` file and to replace::
source [find interface/cmsis-dap.cfg]
with::
source [find interface/jlink.cfg]
.. note::
The firmware image of the LPC-Link2 can be updated using the
`LPCScrypt tool <https://www.nxp.com/design/microcontrollers-developer-resources/lpc-microcontroller-utilities/lpcscrypt-v2-1-1:LPCSCRYPT>`_.
.. note::
The `Mbed project <https://os.mbed.com>`_ also provides some firmware images
`here <https://os.mbed.com/teams/NXP/wiki/Updating-LPCXpresso-firmware>`_.
In addition to a CMSIS-DAP interface, they also provide a convenient update
mechanism through a pseudo USB disk.
Here are the steps to flash a firmware you built into a LPCXpresso11U68 board:
#. Connect the "Link" micro-B USB port to your host computer.
#. Next, simply run the ``west flash`` command
Debugging
=========
Please refer to the `Flashing`_ section and run the ``west debug`` command
instead of ``west flash``.
References
**********
- `LPC11UXX SoC Website`_
- `LPC11U6X Datasheet`_
- `LPC11U6X Reference Manual`_
- `LPCXPRESSO11U68 Website`_
- `LPCXPRESSO11U68 Schematics`_
.. _LPC11UXX SoC Website:
https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc1100-cortex-m0-plus-m0/scalable-entry-level-32-bit-microcontroller-mcu-based-on-arm-cortex-m0-plus-and-cortex-m0-cores:LPC11U00
.. _LPC11U6X Datasheet:
https://www.nxp.com/docs/en/data-sheet/LPC11U6X.pdf
.. _LPC11U6x Reference Manual:
https://www.nxp.com/webapp/Download?colCode=UM10732
.. _LPCXPRESSO11U68 Website:
https://www.nxp.com/design/microcontrollers-developer-resources/lpc-microcontroller-utilities/lpcxpresso-board-for-lpc11u68:OM13058
.. _LPCXPRESSO11U68 Schematics:
https://www.nxp.com/downloads/en/schematics/LPC11U68_Xpresso_v2_Schematic_RevC_1.pdf

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/*
* Copyright (c) 2020 Seagate Technology LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nxp/nxp_lpc11u68.dtsi>
#include <dt-bindings/pinctrl/lpc11u6x-pinctrl.h>
/ {
model = "NXP LPCXPRESSO11U68 board";
compatible = "lpcxpresso11u68", "nxp,lpc";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &uart4;
};
/* These aliases are provided for compatibility with samples. */
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
sw0 = &isp_button;
sw1 = &wake_up_button;
eeprom-0 = &eeprom0;
};
gpio_keys {
compatible = "gpio-keys";
isp_button: button_0 {
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
label = "ISP enable button";
};
wake_up_button: button_1 {
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
label = "Wake-up button";
};
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
label = "Green LED 0";
};
led1: led_1 {
gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
label = "Red LED 1";
};
led2: led_2 {
gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
label = "Blue LED 2";
};
};
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio1 9 0>, /* A0 */
<1 0 &gpio0 14 0>, /* A1 */
<2 0 &gpio0 13 0>, /* A2 */
<3 0 &gpio0 12 0>, /* A3 */
<4 0 &gpio0 23 0>, /* A4 */
<5 0 &gpio0 11 0>, /* A5 */
<6 0 &gpio2 11 0>, /* D0 */
<7 0 &gpio2 12 0>, /* D1 */
<8 0 &gpio1 18 0>, /* D2 */
<9 0 &gpio1 24 0>, /* D3 */
<10 0 &gpio1 19 0>, /* D4 */
<11 0 &gpio1 26 0>, /* D5 */
<12 0 &gpio1 27 0>, /* D6 */
<13 0 &gpio1 25 0>, /* D7 */
<14 0 &gpio1 28 0>, /* D8 */
<15 0 &gpio2 3 0>, /* D9 */
<16 0 &gpio0 2 0>, /* D10 */
<17 0 &gpio0 9 0>, /* D11 */
<18 0 &gpio0 9 0>, /* D12 */
<19 0 &gpio1 29 0>, /* D13 */
<20 0 &gpio0 5 0>, /* D14 */
<21 0 &gpio0 4 0>; /* D15 */
};
};
&uart0 {
pinmuxs = <&pinmux1 26 IOCON_FUNC2>, <&pinmux1 27 IOCON_FUNC2>;
pinmux-names = "RXD", "TXD";
current-speed = <115200>;
status = "okay";
};
arduino_serial: &uart4 {
pinmuxs = <&pinmux2 11 IOCON_FUNC1>, <&pinmux2 12 IOCON_FUNC1>;
pinmux-names = "RXD", "TXD";
current-speed = <115200>;
status = "okay";
};
arduino_i2c: &i2c0 {
pinmuxs = <&pinmux0 4 IOCON_FUNC1>,
<&pinmux0 5 IOCON_FUNC1>;
pinmux-names = "SCL", "SDA";
status = "okay";
};
&cpu0 {
clock-frequency = <48000000>;
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};

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identifier: lpcxpresso11u68
name: NXP LPCxpresso 11U68
type: mcu
arch: arm
toolchain:
- zephyr
supported:
- clock_controller
- pinmux
- gpio
- i2c
- serial
- eeprom

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CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
CONFIG_GPIO=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SOC_SERIES_LPC11U6X=y
# Since the board has little memory (32k), stack sizes are lowered
# so that the application has more RAM for itself.
CONFIG_MAIN_STACK_SIZE=512
CONFIG_ISR_STACK_SIZE=768
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO_LPC11U6X=y
CONFIG_CLOCK_CONTROL_LPC11U6X_ENABLE_SRAM1=y
CONFIG_CLOCK_CONTROL_LPC11U6X_ENABLE_USB_RAM=y
CONFIG_CLOCK_CONTROL_LPC11U6X_PLL_SRC_SYSOSC=y
CONFIG_EEPROM=y
CONFIG_EEPROM_LPC11U6X=y

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# Copyright (c) 2019, NXP
# SPDX-License-Identifier: Apache-2.0
# Suppress DTC warnings due to all GPIO nodes sharing the same register address.
list(APPEND EXTRA_DTC_FLAGS "-Wno-simple_bus_reg")

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#
# NXP LPCXpresso11U68 (evaluation board OM13058)
#
# http://www.nxp.com/board/OM13058.html
# https://www.embeddedartists.com/products/lpc11u68-lpcxpresso/
# https://os.mbed.com/platforms/LPCXpresso11U68/
#
# The on-board LPC-Link2 debug probe (based on a NXP LPC43xx MCU) provides
# either a CMSIS-DAP or a J-Link interface. It depends on the version of the
# embedded firmware. Uncomment the line corresponding to yours.
source [find interface/cmsis-dap.cfg]
# source [find interface/jlink.cfg]
# NXP LPC11U68 Cortex-M0 with 256kB flash and 32kB + 4kB SRAM.
set WORKAREASIZE 0x5000
source [find target/lpc11xx.cfg]
# This ensures that the interrupt vectors (0x0000-0x0200) are re-mapped to
# flash after the "reset halt" command. Else the load/verify functions won't
# work correctly.
#
# Table 8. System memory remap register (SYSMEMREMAP, address 0x40048000) bit
# description
# Bit Symbol Value Description
# 1:0 MAP System memory remap
# 0x0 Boot Loader Mode. Interrupt vectors are re-mapped to
# Boot ROM.
# 0x1 User RAM Mode. Interrupt vectors are re-mapped to
# Static RAM.
# 0x2 User Flash Mode. Interrupt vectors are not re-mapped
# and reside in Flash.
# 31:2 - - Reserved.
$_TARGETNAME configure -event reset-end {
mww 0x40048000 0x02
}
# Enable Zephyr thread awareness.
$_TARGETNAME configure -rtos Zephyr
adapter_khz 100