From 70a0063b69b06812c5726077646cffae3b8e199c Mon Sep 17 00:00:00 2001
From: Kumar Gala <kumar.gala@linaro.org>
Date: Fri, 27 Mar 2020 06:03:59 -0500
Subject: [PATCH] drivers: serial: uart_ns16550: Convert to new DT_INST macros

Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
---
 drivers/serial/uart_ns16550.c        | 30 +++++++------
 drivers/serial/uart_ns16550_port_x.h | 64 ++++++++++++++--------------
 2 files changed, 49 insertions(+), 45 deletions(-)

diff --git a/drivers/serial/uart_ns16550.c b/drivers/serial/uart_ns16550.c
index 3cebe566041..3235f691641 100644
--- a/drivers/serial/uart_ns16550.c
+++ b/drivers/serial/uart_ns16550.c
@@ -1,5 +1,7 @@
 /* ns16550.c - NS16550D serial driver */
 
+#define DT_DRV_COMPAT ns16550
+
 /*
  * Copyright (c) 2010, 2012-2015 Wind River Systems, Inc.
  * Copyright (c) 2020 Intel Corp.
@@ -40,24 +42,24 @@
  * Ditto for DLF and PCI(e).
  */
 
-#if defined(DT_INST_0_NS16550_PCP) || \
-	defined(DT_INST_1_NS16550_PCP) || \
-	defined(DT_INST_2_NS16550_PCP) || \
-	defined(DT_INST_3_NS16550_PCP)
+#if DT_INST_NODE_HAS_PROP(0, pcp) || \
+	DT_INST_NODE_HAS_PROP(1, pcp) || \
+	DT_INST_NODE_HAS_PROP(2, pcp) || \
+	DT_INST_NODE_HAS_PROP(3, pcp)
 #define UART_NS16550_PCP_ENABLED
 #endif
 
-#if defined(DT_INST_0_NS16550_DLF) || \
-	defined(DT_INST_1_NS16550_DLF) || \
-	defined(DT_INST_2_NS16550_DLF) || \
-	defined(DT_INST_3_NS16550_DLF)
+#if DT_INST_NODE_HAS_PROP(0, dlf) || \
+	DT_INST_NODE_HAS_PROP(1, dlf) || \
+	DT_INST_NODE_HAS_PROP(2, dlf) || \
+	DT_INST_NODE_HAS_PROP(3, dlf)
 #define UART_NS16550_DLF_ENABLED
 #endif
 
-#if DT_INST_0_NS16550_PCIE || \
-	DT_INST_1_NS16550_PCIE || \
-	DT_INST_2_NS16550_PCIE || \
-	DT_INST_3_NS16550_PCIE
+#if DT_INST_PROP(0, pcie) || \
+	DT_INST_PROP(1, pcie) || \
+	DT_INST_PROP(2, pcie) || \
+	DT_INST_PROP(3, pcie)
 BUILD_ASSERT_MSG(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE");
 #define UART_NS16550_PCIE_ENABLED
 #include <drivers/pcie/pcie.h>
@@ -222,8 +224,8 @@ BUILD_ASSERT_MSG(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE");
 
 #define IIRC(dev) (DEV_DATA(dev)->iir_cache)
 
-#ifdef DT_INST_0_NS16550_REG_SHIFT
-#define UART_REG_ADDR_INTERVAL (1<<DT_INST_0_NS16550_REG_SHIFT)
+#if DT_INST_NODE_HAS_PROP(0, reg_shift)
+#define UART_REG_ADDR_INTERVAL (1<<DT_INST_PROP(0, reg_shift))
 #endif
 
 #ifdef UART_NS16550_ACCESS_IOPORT
diff --git a/drivers/serial/uart_ns16550_port_x.h b/drivers/serial/uart_ns16550_port_x.h
index 31851f6b9f2..22c2e6b2451 100644
--- a/drivers/serial/uart_ns16550_port_x.h
+++ b/drivers/serial/uart_ns16550_port_x.h
@@ -7,56 +7,58 @@
  * This file is a template for cmake and is not meant to be used directly!
  */
 
-#ifdef DT_INST_@NUM@_NS16550
+#if DT_HAS_DRV_INST(@NUM@)
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 static void irq_config_func_@NUM@(struct device *port);
 #endif
 
 static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_@NUM@ = {
-	.devconf.port = DT_INST_@NUM@_NS16550_BASE_ADDRESS,
-	.devconf.sys_clk_freq = DT_INST_@NUM@_NS16550_CLOCK_FREQUENCY,
+	.devconf.port = DT_INST_REG_ADDR(@NUM@),
+	.devconf.sys_clk_freq = DT_INST_PROP(@NUM@, clock_frequency),
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	.devconf.irq_config_func = irq_config_func_@NUM@,
 #endif
 
-#ifdef DT_INST_@NUM@_NS16550_PCP
-	.pcp = DT_INST_@NUM@_NS16550_PCP,
+#if DT_INST_NODE_HAS_PROP(@NUM@, pcp)
+	.pcp = DT_INST_PROP(@NUM@, pcp),
 #endif
 
-#if DT_INST_@NUM@_NS16550_PCIE
+#if DT_INST_PROP(@NUM@, pcie)
 	.pcie = true,
-	.pcie_bdf = DT_INST_@NUM@_NS16550_BASE_ADDRESS,
-	.pcie_id = DT_INST_@NUM@_NS16550_SIZE,
+	.pcie_bdf = DT_INST_REG_ADDR(@NUM@),
+	.pcie_id = DT_INST_REG_SIZE(@NUM@),
 #endif
 };
 
 static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_@NUM@ = {
-#ifdef DT_INST_@NUM@_NS16550_CURRENT_SPEED
-	.uart_config.baudrate = DT_INST_@NUM@_NS16550_CURRENT_SPEED,
+#if DT_INST_NODE_HAS_PROP(@NUM@, current_speed)
+	.uart_config.baudrate = DT_INST_PROP(@NUM@, current_speed),
 #endif
 	.uart_config.parity = UART_CFG_PARITY_NONE,
 	.uart_config.stop_bits = UART_CFG_STOP_BITS_1,
 	.uart_config.data_bits = UART_CFG_DATA_BITS_8,
-#if DT_INST_@NUM@_NS16550_HW_FLOW_CONTROL
+#if DT_INST_PROP(@NUM@, hw_flow_control)
 	.uart_config.flow_ctrl = UART_CFG_FLOW_CTRL_RTS_CTS,
 #else
 	.uart_config.flow_ctrl = UART_CFG_FLOW_CTRL_NONE,
 #endif
-#ifdef DT_INST_@NUM@_NS16550_DLF
-	.dlf = DT_INST_@NUM@_NS16550_DLF,
+#if DT_INST_NODE_HAS_PROP(@NUM@, dlf)
+	.dlf = DT_INST_PROP(@NUM@, dlf),
 #endif
 };
 
-DEVICE_AND_API_INIT(uart_ns16550_@NUM@, DT_INST_@NUM@_NS16550_LABEL,
+DEVICE_AND_API_INIT(uart_ns16550_@NUM@, DT_INST_LABEL(@NUM@),
 		    &uart_ns16550_init,
 		    &uart_ns16550_dev_data_@NUM@, &uart_ns16550_dev_cfg_@NUM@,
 		    PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
 		    &uart_ns16550_driver_api);
 
-#ifndef DT_INST_@NUM@_NS16550_IRQ_0_SENSE
-#define DT_INST_@NUM@_NS16550_IRQ_0_SENSE 0
+#if DT_INST_IRQ_HAS_CELL(@NUM@, sense)
+#define INST_@NUM@_IRQ_FLAGS  DT_INST_IRQ(@NUM@, sense)
+#else
+#define INST_@NUM@_IRQ_FLAGS 0
 #endif
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
@@ -64,8 +66,8 @@ static void irq_config_func_@NUM@(struct device *dev)
 {
 	ARG_UNUSED(dev);
 
-#if DT_INST_@NUM@_NS16550_PCIE
-#if DT_INST_@NUM@_NS16550_IRQ_0 == PCIE_IRQ_DETECT
+#if DT_INST_PROP(@NUM@, pcie)
+#if DT_INST_IRQN(@NUM@) == PCIE_IRQ_DETECT
 
 	/* PCI(e) with auto IRQ detection */
 
@@ -74,43 +76,43 @@ static void irq_config_func_@NUM@(struct device *dev)
 
 	unsigned int irq;
 
-	irq = pcie_wired_irq(DT_INST_@NUM@_NS16550_BASE_ADDRESS);
+	irq = pcie_wired_irq(DT_INST_REG_ADDR(@NUM@));
 
 	if (irq == PCIE_CONF_INTR_IRQ_NONE) {
 		return;
 	}
 
 	irq_connect_dynamic(irq,
-			    DT_INST_@NUM@_NS16550_IRQ_0_PRIORITY,
+			    DT_INST_IRQ(@NUM@, priority),
 			    uart_ns16550_isr,
 			    DEVICE_GET(uart_ns16550_@NUM@),
-			    DT_INST_@NUM@_NS16550_IRQ_0_SENSE);
+			    INST_@NUM@_IRQ_FLAGS);
 
-	pcie_irq_enable(DT_INST_@NUM@_NS16550_BASE_ADDRESS, irq);
+	pcie_irq_enable(DT_INST_REG_ADDR(@NUM@), irq);
 
 #else
 
 	/* PCI(e) with fixed or MSI IRQ */
 
-	IRQ_CONNECT(DT_INST_@NUM@_NS16550_IRQ_0,
-		    DT_INST_@NUM@_NS16550_IRQ_0_PRIORITY,
+	IRQ_CONNECT(DT_INST_IRQN(@NUM@),
+		    DT_INST_IRQ(@NUM@, priority),
 		    uart_ns16550_isr, DEVICE_GET(uart_ns16550_@NUM@),
-		    DT_INST_@NUM@_NS16550_IRQ_0_SENSE);
+		    INST_@NUM@_IRQ_FLAGS);
 
-	pcie_irq_enable(DT_INST_@NUM@_NS16550_BASE_ADDRESS,
-			DT_INST_@NUM@_NS16550_IRQ_0);
+	pcie_irq_enable(DT_INST_REG_ADDR(@NUM@),
+			DT_INST_IRQN(@NUM@));
 
 #endif
 #else
 
 	/* not PCI(e) */
 
-	IRQ_CONNECT(DT_INST_@NUM@_NS16550_IRQ_0,
-		    DT_INST_@NUM@_NS16550_IRQ_0_PRIORITY,
+	IRQ_CONNECT(DT_INST_IRQN(@NUM@),
+		    DT_INST_IRQ(@NUM@, priority),
 		    uart_ns16550_isr, DEVICE_GET(uart_ns16550_@NUM@),
-		    DT_INST_@NUM@_NS16550_IRQ_0_SENSE);
+		    INST_@NUM@_IRQ_FLAGS);
 
-	irq_enable(DT_INST_@NUM@_NS16550_IRQ_0);
+	irq_enable(DT_INST_IRQN(@NUM@));
 
 #endif
 }