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drivers: usb: udc: support numaker m55m1x series soc

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This supports nuvoton numaker m55m1x series soc. Besides, it also
has relevant modifications, including:
1. Fix failure to enable HICR48M, which is to clock usbd and phy
2. Support HWINFO for USB device serial number

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
This commit is contained in:
Chun-Chieh Li 2025-05-12 10:38:17 +08:00 • committed by Benjamin Cabé
commit 7095608f7c
6 changed files with 54 additions and 7 deletions
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10
boards/nuvoton/numaker_m55m1/numaker_m55m1-pinctrl.dtsi
View file

@ -51,4 +51,14 @@
slew-rate = "fast"; slew-rate = "fast";
}; };
}; };
/* USBD multi-function pins for VBUS, D+, D-, and ID pins */
usbd_default: usbd_default {
group0 {
pinmux = <PA12MFP_USB_VBUS>,
<PA13MFP_USB_D_MINUS>,
<PA14MFP_USB_D_PLUS>,
<PA15MFP_USB_OTG_ID>;
};
};
}; };

15
boards/nuvoton/numaker_m55m1/numaker_m55m1.dts
View file

@ -49,6 +49,14 @@
status = "okay"; status = "okay";
}; };
&gpioh {
status = "okay";
};
&gpioi {
status = "okay";
};
&flash0 { &flash0 {
partitions { partitions {
compatible = "fixed-partitions"; compatible = "fixed-partitions";
@ -99,3 +107,10 @@
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
}; };
/* On enabled, usbd is required to be clocked in 48MHz. */
zephyr_udc0: &usbd {
pinctrl-0 = <&usbd_default>;
pinctrl-names = "default";
status = "okay";
};

2
drivers/hwinfo/Kconfig
View file

@ -265,7 +265,7 @@ config HWINFO_AMBIQ
config HWINFO_NUMAKER config HWINFO_NUMAKER
bool "NuMaker hwinfo" bool "NuMaker hwinfo"
default y default y
depends on SOC_SERIES_M46X depends on SOC_SERIES_M46X || SOC_SERIES_M55M1X
select HWINFO_HAS_DRIVER select HWINFO_HAS_DRIVER
select HAS_NUMAKER_FMC select HAS_NUMAKER_FMC
help help

10
drivers/usb/udc/udc_numaker.c
View file

@ -299,9 +299,17 @@ static int numaker_usbd_hw_setup(const struct device *dev)
SYS_UnlockReg(); SYS_UnlockReg();
/* Configure USB PHY for USBD */ /* Configure USB role as USB Device and enable USB PHY */
#if defined(CONFIG_SOC_SERIES_M46X)
SYS->USBPHY = (SYS->USBPHY & ~SYS_USBPHY_USBROLE_Msk) | SYS->USBPHY = (SYS->USBPHY & ~SYS_USBPHY_USBROLE_Msk) |
(SYS_USBPHY_USBROLE_STD_USBD | SYS_USBPHY_USBEN_Msk | SYS_USBPHY_SBO_Msk); (SYS_USBPHY_USBROLE_STD_USBD | SYS_USBPHY_USBEN_Msk | SYS_USBPHY_SBO_Msk);
#elif defined(CONFIG_SOC_SERIES_M2L31X)
SYS->USBPHY = (SYS->USBPHY & ~SYS_USBPHY_USBROLE_Msk) |
(SYS_USBPHY_USBROLE_STD_USBD | SYS_USBPHY_USBEN_Msk | SYS_USBPHY_SBO_Msk);
#elif defined(CONFIG_SOC_SERIES_M55M1X)
SYS->USBPHY = (SYS->USBPHY & ~SYS_USBPHY_USBROLE_Msk) |
((0 << SYS_USBPHY_USBROLE_Pos) | SYS_USBPHY_OTGPHYEN_Msk);
#endif
/* Invoke Clock controller to enable module clock */ /* Invoke Clock controller to enable module clock */
memset(&scc_subsys, 0x00, sizeof(scc_subsys)); memset(&scc_subsys, 0x00, sizeof(scc_subsys));

14
dts/arm/nuvoton/m55m1x.dtsi
View file

@ -45,6 +45,7 @@
reg = <0x40001000 0x100>; reg = <0x40001000 0x100>;
#clock-cells = <0>; #clock-cells = <0>;
lxt = "enable"; lxt = "enable";
hirc48m = "enable";
clk-pclkdiv = <(NUMAKER_CLK_PCLKDIV_PCLK0DIV(2) | clk-pclkdiv = <(NUMAKER_CLK_PCLKDIV_PCLK0DIV(2) |
NUMAKER_CLK_PCLKDIV_PCLK1DIV(2) | NUMAKER_CLK_PCLKDIV_PCLK1DIV(2) |
NUMAKER_CLK_PCLKDIV_PCLK2DIV(2) | NUMAKER_CLK_PCLKDIV_PCLK2DIV(2) |
@ -460,6 +461,19 @@
#pwm-cells = <3>; #pwm-cells = <3>;
status = "disabled"; status = "disabled";
}; };
usbd: usbd@4025c000 {
compatible = "nuvoton,numaker-usbd";
reg = <0x4025c000 0x1000>;
interrupts = <58 0>;
resets = <&rst NUMAKER_SYS_USBD0RST>;
clocks = <&pcc NUMAKER_USBD0_MODULE NUMAKER_CLK_USBSEL_USBSEL_HIRC48M
NUMAKER_CLK_USBDIV_USBDIV(1)>;
dma-buffer-size = <1536>;
status = "disabled";
num-bidir-endpoints = <25>;
disallow-iso-in-out-same-number;
};
}; };
}; };

10
soc/nuvoton/numaker/m55m1x/soc.c
View file

@ -141,13 +141,13 @@ void soc_reset_hook(void)
/* Wait for LIRC clock ready */ /* Wait for LIRC clock ready */
CLK_WaitClockReady(CLK_STATUS_LIRCSTB_Msk); CLK_WaitClockReady(CLK_STATUS_LIRCSTB_Msk);
#if DT_NODE_HAS_PROP(DT_NODELABEL(scc), hirc48) #if DT_NODE_HAS_PROP(DT_NODELABEL(scc), hirc48m)
/* Enable/disable 48 MHz high-speed internal RC oscillator (HIRC48) */ /* Enable/disable 48 MHz high-speed internal RC oscillator (HIRC48M) */
if (DT_ENUM_IDX(DT_NODELABEL(scc), hirc48) == NUMAKER_SCC_CLKSW_ENABLE) { if (DT_ENUM_IDX(DT_NODELABEL(scc), hirc48m) == NUMAKER_SCC_CLKSW_ENABLE) {
CLK_EnableXtalRC(CLK_SRCCTL_HIRC48MEN_Msk); CLK_EnableXtalRC(CLK_SRCCTL_HIRC48MEN_Msk);
/* Wait for HIRC48 clock ready */ /* Wait for HIRC48M clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRC48MSTB_Msk); CLK_WaitClockReady(CLK_STATUS_HIRC48MSTB_Msk);
} else if (DT_ENUM_IDX(DT_NODELABEL(scc), hirc48) == NUMAKER_SCC_CLKSW_DISABLE) { } else if (DT_ENUM_IDX(DT_NODELABEL(scc), hirc48m) == NUMAKER_SCC_CLKSW_DISABLE) {
CLK_DisableXtalRC(CLK_SRCCTL_HIRC48MEN_Msk); CLK_DisableXtalRC(CLK_SRCCTL_HIRC48MEN_Msk);
} }
#endif #endif