drivers/clock: it51xxx: Disable eSPI pad before changing PLL sequence
We have to disable eSPI pad before changing PLL sequence or sequence will fail if CS# pin is low. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
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1 changed files with 12 additions and 1 deletions
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@ -15,6 +15,7 @@
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(clock_control_it51xxx, LOG_LEVEL_ERR);
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#include "soc_espi.h"
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BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
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"only one ite,it51xxx-ecpm compatible node can be supported");
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@ -171,11 +172,21 @@ static int clock_control_it51xxx_init(const struct device *dev)
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ite_intc_save_and_disable_interrupts();
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}
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#ifdef CONFIG_ESPI
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/*
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* We have to disable eSPI pad before changing PLL sequence
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* or sequence will fail if CS# pin is low.
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*/
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espi_ite_ec_enable_pad_ctrl(ESPI_ITE_SOC_DEV, false);
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#endif
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if (reg_val != data->pll_configuration[config->pll_freq]) {
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/* configure PLL clock */
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chip_configure_pll(dev, data->pll_configuration[config->pll_freq]);
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}
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#ifdef CONFIG_ESPI
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/* Enable eSPI pad after changing PLL sequence */
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espi_ite_ec_enable_pad_ctrl(ESPI_ITE_SOC_DEV, true);
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#endif
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if (IS_ENABLED(CONFIG_ITE_IT51XXX_INTC)) {
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ite_intc_restore_interrupts();
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}
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