From 701d6bd08768dabfc763d8fd29a12fe30150c2f3 Mon Sep 17 00:00:00 2001 From: Francois Ramu Date: Fri, 26 Nov 2021 15:18:13 +0100 Subject: [PATCH] drivers: watchdog: stm32G0 window watchdog during debug This commit is enabling the Debug support clock like the stm32L0 or F0, the APB peripheral clock enable register 1 has a bit to clock DBGMCU before use. Signed-off-by: Francois Ramu --- drivers/watchdog/wdt_wwdg_stm32.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/watchdog/wdt_wwdg_stm32.c b/drivers/watchdog/wdt_wwdg_stm32.c index 36ad6c13cd1..14fad642ca2 100644 --- a/drivers/watchdog/wdt_wwdg_stm32.c +++ b/drivers/watchdog/wdt_wwdg_stm32.c @@ -168,6 +168,8 @@ static int wwdg_stm32_setup(const struct device *dev, uint8_t options) LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_DBGMCU); #elif defined(CONFIG_SOC_SERIES_STM32L0X) LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_DBGMCU); +#elif defined(CONFIG_SOC_SERIES_STM32G0X) + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DBGMCU); #endif #if defined(CONFIG_SOC_SERIES_STM32H7X) LL_DBGMCU_APB3_GRP1_FreezePeriph(LL_DBGMCU_APB3_GRP1_WWDG1_STOP);