kernel: Add a "nocache" read-write memory section

Add a "nocache" read-write memory section that is configured to
not be cached. This memory section can be used to perform DMA
transfers when cache coherence issues are not optimal or can not
be solved using cache maintenance operations.

This is currently only supported on ARM Cortex M7 with MPU.

Fixes #2927

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2018-11-07 23:40:43 +01:00 committed by Andrew Boie
commit 6fd1691b94
9 changed files with 98 additions and 6 deletions

View file

@ -270,6 +270,19 @@ extern char __sg_end[];
extern char __sg_size[];
#endif /* CONFIG_ARM_FIRMWARE_HAS_SECURE_ENTRY_FUNCS */
/*
* Non-cached kernel memory region, currently only available on ARM Cortex-M7
* with a MPU. Start and end will be aligned for memory management/protection
* hardware for the target architecture.
*
* All the functions with '__nocache' keyword will be placed into this
* section.
*/
#ifdef CONFIG_NOCACHE_MEMORY
extern char _nocache_ram_start[];
extern char _nocache_ram_end[];
extern char _nocache_ram_size[];
#endif /* CONFIG_NOCACHE_MEMORY */
#endif /* ! _ASMLANGUAGE */

View file

@ -25,6 +25,10 @@
#define __ccm_noinit_section _GENERIC_SECTION(_CCM_NOINIT_SECTION_NAME)
#endif /* CONFIG_ARM */
#if defined(CONFIG_NOCACHE_MEMORY)
#define __nocache __in_section_unique(_NOCACHE_SECTION_NAME)
#endif /* CONFIG_NOCACHE_MEMORY */
#endif /* !_ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_LINKER_SECTION_TAGS_H_ */

View file

@ -56,7 +56,10 @@
#define _CCM_DATA_SECTION_NAME .ccm_data
#define _CCM_BSS_SECTION_NAME .ccm_bss
#define _CCM_NOINIT_SECTION_NAME .ccm_noinit
#endif
#ifdef CONFIG_NOCACHE_MEMORY
#define _NOCACHE_SECTION_NAME nocache
#endif
#include <linker/section_tags.h>