diff --git a/arch/x86/core/early_serial.c b/arch/x86/core/early_serial.c index 20da9d53500..6cf9dce5eeb 100644 --- a/arch/x86/core/early_serial.c +++ b/arch/x86/core/early_serial.c @@ -10,7 +10,7 @@ /* Super-primitive 8250/16550 serial output-only driver, 115200 8n1 */ -#define PORT ((io_port_t)DT_UART_NS16550_PORT_0_BASE_ADDR) +#define PORT ((io_port_t)DT_INST_0_NS16550_BASE_ADDRESS) #define REG_IER 0x01 /* Interrupt enable reg. */ #define REG_LCR 0x03 /* Line control reg. */ diff --git a/boards/arc/em_starterkit/Kconfig.defconfig b/boards/arc/em_starterkit/Kconfig.defconfig index cb2c3b68e08..da62653c34c 100644 --- a/boards/arc/em_starterkit/Kconfig.defconfig +++ b/boards/arc/em_starterkit/Kconfig.defconfig @@ -52,10 +52,6 @@ config UART_NS16550 default y depends on SERIAL -config UART_NS16550_PORT_1 - default y - depends on UART_CONSOLE - if SPI config SPI_DW diff --git a/boards/arc/emsdp/Kconfig.defconfig b/boards/arc/emsdp/Kconfig.defconfig index e34ba865515..caf7a1aae99 100644 --- a/boards/arc/emsdp/Kconfig.defconfig +++ b/boards/arc/emsdp/Kconfig.defconfig @@ -30,8 +30,4 @@ config UART_NS16550 default y depends on SERIAL -config UART_NS16550_PORT_0 - default y - depends on UART_CONSOLE - endif # BOARD_EMSDP diff --git a/boards/arm/bcm958401m2/bcm958401m2_defconfig b/boards/arm/bcm958401m2/bcm958401m2_defconfig index 38bf5fb3bc6..fd1e261d793 100644 --- a/boards/arm/bcm958401m2/bcm958401m2_defconfig +++ b/boards/arm/bcm958401m2/bcm958401m2_defconfig @@ -9,7 +9,6 @@ CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_UART_NS16550=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y -CONFIG_UART_NS16550_PORT_1=y CONFIG_CORTEX_M_SYSTICK=y CONFIG_FLASH_SIZE=0 CONFIG_FLASH_BASE_ADDRESS=0x0 diff --git a/boards/arm/mec1501modular_assy6885/Kconfig.defconfig b/boards/arm/mec1501modular_assy6885/Kconfig.defconfig index fb5ba2c13fc..9e54632e5e3 100644 --- a/boards/arm/mec1501modular_assy6885/Kconfig.defconfig +++ b/boards/arm/mec1501modular_assy6885/Kconfig.defconfig @@ -6,10 +6,6 @@ if BOARD_MEC1501MODULAR_ASSY6885 config BOARD default "mec1501modular_assy6885" -config UART_NS16550_PORT_1 - default y if UART_CONSOLE - depends on UART_NS16550 - if PINMUX_XEC config PINMUX_XEC_GPIO000_036 diff --git a/boards/arm/mec1501modular_assy6885/pinmux.c b/boards/arm/mec1501modular_assy6885/pinmux.c index 2054aec70a5..760aafea07c 100644 --- a/boards/arm/mec1501modular_assy6885/pinmux.c +++ b/boards/arm/mec1501modular_assy6885/pinmux.c @@ -158,7 +158,7 @@ static int board_pinmux_init(struct device *dev) pinmux_pin_set(portf, MCHP_GPIO_250, MCHP_GPIO_CTRL_MUX_F0); /* See table 2-4 from the data sheet for pin multiplexing*/ -#ifdef CONFIG_UART_NS16550_PORT_1 +#ifdef DT_NS16550_400F2800_BASE_ADDRESS /* Set muxing, for UART 1 TX/RX and power up */ mchp_pcr_periph_slp_ctrl(PCR_UART1, MCHP_PCR_SLEEP_DIS); diff --git a/boards/arm/mec15xxevb_assy6853/Kconfig.defconfig b/boards/arm/mec15xxevb_assy6853/Kconfig.defconfig index 98f5e899921..bcae7ce400e 100644 --- a/boards/arm/mec15xxevb_assy6853/Kconfig.defconfig +++ b/boards/arm/mec15xxevb_assy6853/Kconfig.defconfig @@ -6,10 +6,6 @@ if BOARD_MEC15XXEVB_ASSY6853 config BOARD default "mec15xxevb_assy6853" -config UART_NS16550_PORT_2 - default y if UART_CONSOLE - depends on UART_NS16550 - if PINMUX_XEC config PINMUX_XEC_GPIO000_036 diff --git a/boards/arm/mec15xxevb_assy6853/pinmux.c b/boards/arm/mec15xxevb_assy6853/pinmux.c index 1f6a5db3379..6ba0e0bbb8b 100644 --- a/boards/arm/mec15xxevb_assy6853/pinmux.c +++ b/boards/arm/mec15xxevb_assy6853/pinmux.c @@ -158,7 +158,7 @@ static int board_pinmux_init(struct device *dev) pinmux_pin_set(portf, MCHP_GPIO_250, MCHP_GPIO_CTRL_MUX_F0); /* See table 2-4 from the data sheet for pin multiplexing*/ -#ifdef CONFIG_UART_NS16550_PORT_2 +#ifdef DT_NS16550_400F2C00_BASE_ADDRESS /* Set muxing, for UART 2 TX/RX and power up */ mchp_pcr_periph_slp_ctrl(PCR_UART2, MCHP_PCR_SLEEP_DIS); diff --git a/boards/arm/mec2016evb_assy6797/Kconfig.defconfig b/boards/arm/mec2016evb_assy6797/Kconfig.defconfig index 4e8458476f8..fd416a22c43 100644 --- a/boards/arm/mec2016evb_assy6797/Kconfig.defconfig +++ b/boards/arm/mec2016evb_assy6797/Kconfig.defconfig @@ -6,8 +6,4 @@ if BOARD_MEC2016EVB_ASSY6797 config BOARD default "mec2016evb_assy6797" -config UART_NS16550_PORT_0 - default y if UART_CONSOLE - depends on UART_NS16550 - endif # BOARD_MEC2016EVB_ASSY6797 diff --git a/boards/arm/mec2016evb_assy6797/pinmux.c b/boards/arm/mec2016evb_assy6797/pinmux.c index 4d29276feed..a4287dfb680 100644 --- a/boards/arm/mec2016evb_assy6797/pinmux.c +++ b/boards/arm/mec2016evb_assy6797/pinmux.c @@ -15,7 +15,7 @@ static int board_pinmux_init(struct device *dev) ARG_UNUSED(dev); /* See table 2-4 from the Data sheet*/ -#ifdef CONFIG_UART_NS16550_PORT_0 +#ifdef DT_NS16550_400F2400_BASE_ADDRESS /* Set muxing, for UART 0 and power up */ PCR_INST->CLK_REQ_2_b.UART_0_CLK_REQ = 1; UART0_INST->CONFIG = 0; @@ -24,7 +24,7 @@ static int board_pinmux_init(struct device *dev) GPIO_100_137_INST->GPIO_105_PIN_CONTROL_b.MUX_CONTROL = 1; #endif -#ifdef CONFIG_UART_NS16550_PORT_1 +#ifdef DT_NS16550_400F2800_BASE_ADDRESS /* Set muxing, for UART 1 and power up */ PCR_INST->CLK_REQ_2_b.UART_1_CLK_REQ = 1; UART1_INST->CONFIG = 0; diff --git a/boards/nios2/qemu_nios2/qemu_nios2_defconfig b/boards/nios2/qemu_nios2/qemu_nios2_defconfig index 03684c98ebf..54d9f3c0d53 100644 --- a/boards/nios2/qemu_nios2/qemu_nios2_defconfig +++ b/boards/nios2/qemu_nios2/qemu_nios2_defconfig @@ -8,7 +8,6 @@ CONFIG_PRINTK=y CONFIG_SERIAL=y CONFIG_UART_ALTERA_JTAG=y CONFIG_UART_NS16550=y -CONFIG_UART_NS16550_PORT_0=y CONFIG_UART_CONSOLE=y CONFIG_INCLUDE_RESET_VECTOR=n CONFIG_EXTRA_EXCEPTION_INFO=y diff --git a/boards/x86/gpmrb/Kconfig.defconfig b/boards/x86/gpmrb/Kconfig.defconfig index 584210b14c1..66960fbee20 100644 --- a/boards/x86/gpmrb/Kconfig.defconfig +++ b/boards/x86/gpmrb/Kconfig.defconfig @@ -12,22 +12,6 @@ config BOARD config BUILD_OUTPUT_STRIPPED default y -if UART_NS16550 - -config UART_NS16550_PORT_0 - default y - -config UART_NS16550_PORT_1 - default y - -config UART_NS16550_PORT_2 - default y - -config UART_NS16550_PORT_3 - default y - -endif # UART_NS16550 - if I2C config I2C_0 diff --git a/boards/x86/up_squared/Kconfig.defconfig b/boards/x86/up_squared/Kconfig.defconfig index 59e30d84bc9..ef6e32b0002 100644 --- a/boards/x86/up_squared/Kconfig.defconfig +++ b/boards/x86/up_squared/Kconfig.defconfig @@ -8,16 +8,6 @@ config BOARD config BUILD_OUTPUT_STRIPPED default y -if UART_NS16550 - -config UART_NS16550_PORT_0 - default y - -config UART_NS16550_PORT_1 - default y - -endif # UART_NS16550 - if I2C config I2C_0 diff --git a/boards/xtensa/intel_s1000_crb/Kconfig.defconfig b/boards/xtensa/intel_s1000_crb/Kconfig.defconfig index fbead968776..3b973a155dd 100644 --- a/boards/xtensa/intel_s1000_crb/Kconfig.defconfig +++ b/boards/xtensa/intel_s1000_crb/Kconfig.defconfig @@ -85,19 +85,12 @@ config USB_DEVICE_PRODUCT endif # USB -if UART_NS16550 - -config UART_NS16550_PORT_0 - default y - -if UART_NS16550_PORT_0 +if SERIAL config UART_INTERRUPT_DRIVEN default y -endif # UART_NS16550_PORT_0 - -endif # UART_NS16550 +endif # SERIAL if I2C diff --git a/drivers/serial/CMakeLists.txt b/drivers/serial/CMakeLists.txt index 2455e67dade..f7a753d104b 100644 --- a/drivers/serial/CMakeLists.txt +++ b/drivers/serial/CMakeLists.txt @@ -36,13 +36,11 @@ zephyr_library_sources_ifdef(CONFIG_USERSPACE uart_handlers.c) if(CONFIG_UART_NS16550) zephyr_library_sources(uart_ns16550.c) foreach(NUM RANGE 0 3) - if (CONFIG_UART_NS16550_PORT_${NUM}) - configure_file( - uart_ns16550_port_x.h - ${PROJECT_BINARY_DIR}/include/generated/uart_ns16550_port_${NUM}.h - @ONLY - ) - endif() + configure_file( + uart_ns16550_port_x.h + ${PROJECT_BINARY_DIR}/include/generated/uart_ns16550_port_${NUM}.h + @ONLY + ) endforeach(NUM) endif() diff --git a/drivers/serial/Kconfig.ns16550 b/drivers/serial/Kconfig.ns16550 index 07c0631b0f2..2ae284537d0 100644 --- a/drivers/serial/Kconfig.ns16550 +++ b/drivers/serial/Kconfig.ns16550 @@ -40,27 +40,3 @@ config UART_NS16550_ACCESS_WORD_ONLY In some case, e.g. ARC HS Development kit, the peripheral space of ns 16550 (DesignWare UART) only allows word access, byte access will raise exception. - -menuconfig UART_NS16550_PORT_0 - bool "Enable NS16550 Port 0" - depends on UART_NS16550 - help - This tells the driver to configure the UART port at boot. - -menuconfig UART_NS16550_PORT_1 - bool "Enable NS16550 Port 1" - depends on UART_NS16550 - help - This tells the driver to configure the UART port at boot. - -menuconfig UART_NS16550_PORT_2 - bool "Enable NS16550 Port 2" - depends on UART_NS16550 - help - This tells the driver to configure the UART port at boot. - -menuconfig UART_NS16550_PORT_3 - bool "Enable NS16550 Port 3" - depends on UART_NS16550 - help - This tells the driver to configure the UART port at boot. diff --git a/drivers/serial/uart_ns16550.c b/drivers/serial/uart_ns16550.c index 05cf78efa6d..03429396b65 100644 --- a/drivers/serial/uart_ns16550.c +++ b/drivers/serial/uart_ns16550.c @@ -40,24 +40,24 @@ * Ditto for DLF and PCI(e). */ -#if defined(DT_UART_NS16550_PORT_0_PCP) || \ - defined(DT_UART_NS16550_PORT_1_PCP) || \ - defined(DT_UART_NS16550_PORT_2_PCP) || \ - defined(DT_UART_NS16550_PORT_3_PCP) +#if defined(DT_INST_0_NS16550_PCP) || \ + defined(DT_INST_1_NS16550_PCP) || \ + defined(DT_INST_2_NS16550_PCP) || \ + defined(DT_INST_3_NS16550_PCP) #define UART_NS16550_PCP_ENABLED #endif -#if defined(DT_UART_NS16550_PORT_0_DLF) || \ - defined(DT_UART_NS16550_PORT_1_DLF) || \ - defined(DT_UART_NS16550_PORT_2_DLF) || \ - defined(DT_UART_NS16550_PORT_3_DLF) +#if defined(DT_INST_0_NS16550_DLF) || \ + defined(DT_INST_1_NS16550_DLF) || \ + defined(DT_INST_2_NS16550_DLF) || \ + defined(DT_INST_3_NS16550_DLF) #define UART_NS16550_DLF_ENABLED #endif -#if DT_UART_NS16550_PORT_0_PCIE || \ - DT_UART_NS16550_PORT_1_PCIE || \ - DT_UART_NS16550_PORT_2_PCIE || \ - DT_UART_NS16550_PORT_3_PCIE +#if DT_INST_0_NS16550_PCIE || \ + DT_INST_1_NS16550_PCIE || \ + DT_INST_2_NS16550_PCIE || \ + DT_INST_3_NS16550_PCIE BUILD_ASSERT_MSG(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE"); #define UART_NS16550_PCIE_ENABLED #include @@ -222,8 +222,8 @@ BUILD_ASSERT_MSG(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE"); #define IIRC(dev) (DEV_DATA(dev)->iir_cache) -#ifdef DT_NS16550_REG_SHIFT -#define UART_REG_ADDR_INTERVAL (1< -#endif - -#ifdef CONFIG_UART_NS16550_PORT_1 #include -#endif - -#ifdef CONFIG_UART_NS16550_PORT_2 #include -#endif - -#ifdef CONFIG_UART_NS16550_PORT_3 #include -#endif diff --git a/drivers/serial/uart_ns16550_port_x.h b/drivers/serial/uart_ns16550_port_x.h index 28b9f44500a..31851f6b9f2 100644 --- a/drivers/serial/uart_ns16550_port_x.h +++ b/drivers/serial/uart_ns16550_port_x.h @@ -7,57 +7,65 @@ * This file is a template for cmake and is not meant to be used directly! */ +#ifdef DT_INST_@NUM@_NS16550 + #ifdef CONFIG_UART_INTERRUPT_DRIVEN static void irq_config_func_@NUM@(struct device *port); #endif static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_@NUM@ = { - .devconf.port = DT_UART_NS16550_PORT_@NUM@_BASE_ADDR, - .devconf.sys_clk_freq = DT_UART_NS16550_PORT_@NUM@_CLK_FREQ, + .devconf.port = DT_INST_@NUM@_NS16550_BASE_ADDRESS, + .devconf.sys_clk_freq = DT_INST_@NUM@_NS16550_CLOCK_FREQUENCY, #ifdef CONFIG_UART_INTERRUPT_DRIVEN .devconf.irq_config_func = irq_config_func_@NUM@, #endif -#ifdef DT_UART_NS16550_PORT_@NUM@_PCP - .pcp = DT_UART_NS16550_PORT_@NUM@_PCP, +#ifdef DT_INST_@NUM@_NS16550_PCP + .pcp = DT_INST_@NUM@_NS16550_PCP, #endif -#if DT_UART_NS16550_PORT_@NUM@_PCIE +#if DT_INST_@NUM@_NS16550_PCIE .pcie = true, - .pcie_bdf = DT_UART_NS16550_PORT_@NUM@_BASE_ADDR, - .pcie_id = DT_UART_NS16550_PORT_@NUM@_SIZE, + .pcie_bdf = DT_INST_@NUM@_NS16550_BASE_ADDRESS, + .pcie_id = DT_INST_@NUM@_NS16550_SIZE, #endif }; static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_@NUM@ = { - .uart_config.baudrate = DT_UART_NS16550_PORT_@NUM@_BAUD_RATE, +#ifdef DT_INST_@NUM@_NS16550_CURRENT_SPEED + .uart_config.baudrate = DT_INST_@NUM@_NS16550_CURRENT_SPEED, +#endif .uart_config.parity = UART_CFG_PARITY_NONE, .uart_config.stop_bits = UART_CFG_STOP_BITS_1, .uart_config.data_bits = UART_CFG_DATA_BITS_8, -#if DT_UART_NS16550_PORT_@NUM@_HW_FLOW_CONTROL +#if DT_INST_@NUM@_NS16550_HW_FLOW_CONTROL .uart_config.flow_ctrl = UART_CFG_FLOW_CTRL_RTS_CTS, #else .uart_config.flow_ctrl = UART_CFG_FLOW_CTRL_NONE, #endif -#ifdef DT_UART_NS16550_PORT_@NUM@_DLF - .dlf = DT_UART_NS16550_PORT_@NUM@_DLF, +#ifdef DT_INST_@NUM@_NS16550_DLF + .dlf = DT_INST_@NUM@_NS16550_DLF, #endif }; -DEVICE_AND_API_INIT(uart_ns16550_@NUM@, DT_UART_NS16550_PORT_@NUM@_NAME, +DEVICE_AND_API_INIT(uart_ns16550_@NUM@, DT_INST_@NUM@_NS16550_LABEL, &uart_ns16550_init, &uart_ns16550_dev_data_@NUM@, &uart_ns16550_dev_cfg_@NUM@, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &uart_ns16550_driver_api); +#ifndef DT_INST_@NUM@_NS16550_IRQ_0_SENSE +#define DT_INST_@NUM@_NS16550_IRQ_0_SENSE 0 +#endif + #ifdef CONFIG_UART_INTERRUPT_DRIVEN static void irq_config_func_@NUM@(struct device *dev) { ARG_UNUSED(dev); -#if DT_UART_NS16550_PORT_@NUM@_PCIE -#if DT_UART_NS16550_PORT_@NUM@_IRQ == PCIE_IRQ_DETECT +#if DT_INST_@NUM@_NS16550_PCIE +#if DT_INST_@NUM@_NS16550_IRQ_0 == PCIE_IRQ_DETECT /* PCI(e) with auto IRQ detection */ @@ -66,44 +74,46 @@ static void irq_config_func_@NUM@(struct device *dev) unsigned int irq; - irq = pcie_wired_irq(DT_UART_NS16550_PORT_@NUM@_BASE_ADDR); + irq = pcie_wired_irq(DT_INST_@NUM@_NS16550_BASE_ADDRESS); if (irq == PCIE_CONF_INTR_IRQ_NONE) { return; } irq_connect_dynamic(irq, - DT_UART_NS16550_PORT_@NUM@_IRQ_PRI, + DT_INST_@NUM@_NS16550_IRQ_0_PRIORITY, uart_ns16550_isr, DEVICE_GET(uart_ns16550_@NUM@), - DT_UART_NS16550_PORT_@NUM@_IRQ_FLAGS); + DT_INST_@NUM@_NS16550_IRQ_0_SENSE); - pcie_irq_enable(DT_UART_NS16550_PORT_@NUM@_BASE_ADDR, irq); + pcie_irq_enable(DT_INST_@NUM@_NS16550_BASE_ADDRESS, irq); #else /* PCI(e) with fixed or MSI IRQ */ - IRQ_CONNECT(DT_UART_NS16550_PORT_@NUM@_IRQ, - DT_UART_NS16550_PORT_@NUM@_IRQ_PRI, + IRQ_CONNECT(DT_INST_@NUM@_NS16550_IRQ_0, + DT_INST_@NUM@_NS16550_IRQ_0_PRIORITY, uart_ns16550_isr, DEVICE_GET(uart_ns16550_@NUM@), - DT_UART_NS16550_PORT_@NUM@_IRQ_FLAGS); + DT_INST_@NUM@_NS16550_IRQ_0_SENSE); - pcie_irq_enable(DT_UART_NS16550_PORT_@NUM@_BASE_ADDR, - DT_UART_NS16550_PORT_@NUM@_IRQ); + pcie_irq_enable(DT_INST_@NUM@_NS16550_BASE_ADDRESS, + DT_INST_@NUM@_NS16550_IRQ_0); #endif #else /* not PCI(e) */ - IRQ_CONNECT(DT_UART_NS16550_PORT_@NUM@_IRQ, - DT_UART_NS16550_PORT_@NUM@_IRQ_PRI, + IRQ_CONNECT(DT_INST_@NUM@_NS16550_IRQ_0, + DT_INST_@NUM@_NS16550_IRQ_0_PRIORITY, uart_ns16550_isr, DEVICE_GET(uart_ns16550_@NUM@), - DT_UART_NS16550_PORT_@NUM@_IRQ_FLAGS); + DT_INST_@NUM@_NS16550_IRQ_0_SENSE); - irq_enable(DT_UART_NS16550_PORT_@NUM@_IRQ); + irq_enable(DT_INST_@NUM@_NS16550_IRQ_0); #endif } #endif + +#endif diff --git a/dts/arm/microchip/mec1501hsz.dtsi b/dts/arm/microchip/mec1501hsz.dtsi index a3fe7aca864..453dbd5d404 100644 --- a/dts/arm/microchip/mec1501hsz.dtsi +++ b/dts/arm/microchip/mec1501hsz.dtsi @@ -56,6 +56,7 @@ compatible = "ns16550"; reg = <0x400f2400 0x400>; interrupts = <40 0>; + clock-frequency = <1843200>; current-speed = <38400>; label = "UART_0"; reg-shift = <0>; @@ -65,6 +66,7 @@ compatible = "ns16550"; reg = <0x400f2800 0x400>; interrupts = <41 0>; + clock-frequency = <1843200>; current-speed = <38400>; label = "UART_1"; reg-shift = <0>; @@ -74,6 +76,7 @@ compatible = "ns16550"; reg = <0x400f2c00 0x400>; interrupts = <44 0>; + clock-frequency = <1843200>; current-speed = <38400>; label = "UART_2"; reg-shift = <0>; diff --git a/dts/arm/microchip/mec1701qsz.dtsi b/dts/arm/microchip/mec1701qsz.dtsi index 5a77ff759e2..242d339cd3c 100644 --- a/dts/arm/microchip/mec1701qsz.dtsi +++ b/dts/arm/microchip/mec1701qsz.dtsi @@ -32,6 +32,7 @@ compatible = "ns16550"; reg = <0x400f2400 0x400>; interrupts = <40 0>; + clock-frequency = <1843200>; current-speed = <38400>; label = "UART_0"; reg-shift = <0>; @@ -41,6 +42,7 @@ compatible = "ns16550"; reg = <0x400f2800 0x400>; interrupts = <41 0>; + clock-frequency = <1843200>; current-speed = <38400>; label = "UART_1"; reg-shift = <0>; diff --git a/dts/nios2/nios2-qemu.dtsi b/dts/nios2/nios2-qemu.dtsi index 62d9a0673a4..b41845209c3 100644 --- a/dts/nios2/nios2-qemu.dtsi +++ b/dts/nios2/nios2-qemu.dtsi @@ -42,6 +42,8 @@ ns16550_uart: uart@440000 { compatible = "ns16550"; reg = <0x440000 0x400>; + /* interrupts = <1 0>; */ + clock-frequency = <50000000>; label = "UART_0"; status = "disabled"; diff --git a/dts/nios2/nios2f.dtsi b/dts/nios2/nios2f.dtsi index dbb63a185a0..82faa8f22ca 100644 --- a/dts/nios2/nios2f.dtsi +++ b/dts/nios2/nios2f.dtsi @@ -35,6 +35,8 @@ uart0: uart@f0008000 { compatible = "ns16550"; reg = <0xf0008000 0x400>; + clock-frequency = <50000000>; + /* interrupts = <1 0>; */ label = "UART_0"; status = "disabled"; diff --git a/soc/arc/snps_arc_hsdk/Kconfig.defconfig b/soc/arc/snps_arc_hsdk/Kconfig.defconfig index d765f31b7a3..0c9f12e1f2c 100644 --- a/soc/arc/snps_arc_hsdk/Kconfig.defconfig +++ b/soc/arc/snps_arc_hsdk/Kconfig.defconfig @@ -46,14 +46,8 @@ config UART_NS16550 default y depends on SERIAL -if UART_CONSOLE - -config UART_NS16550_PORT_0 - default y - config UART_NS16550_ACCESS_WORD_ONLY default y - -endif # UART_CONSOLE + depends on UART_NS16550 endif # ARC_HSDK diff --git a/soc/arc/snps_arc_hsdk/dts_fixup.h b/soc/arc/snps_arc_hsdk/dts_fixup.h index e78d4866e5a..ab84954323a 100644 --- a/soc/arc/snps_arc_hsdk/dts_fixup.h +++ b/soc/arc/snps_arc_hsdk/dts_fixup.h @@ -6,16 +6,6 @@ /* SoC level DTS fixup file */ -/* - * UART configuration - */ -#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_F0005000_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_F0005000_IRQ_0 -#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_F0005000_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_F0005000_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_F0005000_LABEL -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_F0005000_IRQ_0_PRIORITY - /* * GPIO configuration */ diff --git a/soc/arc/snps_arc_hsdk/soc.h b/soc/arc/snps_arc_hsdk/soc.h index c4044001936..6641babd294 100644 --- a/soc/arc/snps_arc_hsdk/soc.h +++ b/soc/arc/snps_arc_hsdk/soc.h @@ -32,13 +32,6 @@ #include #include -/* - * UARTs: UART0 & UART1 & UART2 - */ -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS 0 /* Default */ -#define DT_UART_NS16550_PORT_1_IRQ_FLAGS 0 /* Default */ -#define DT_UART_NS16550_PORT_2_IRQ_FLAGS 0 /* Default */ - /* PINMUX IO Hardware Functions */ #define HSDK_PINMUX_FUNS 8 diff --git a/soc/arc/snps_arc_iot/Kconfig.defconfig b/soc/arc/snps_arc_iot/Kconfig.defconfig index 4ab4d8b9d8b..a2224c00211 100644 --- a/soc/arc/snps_arc_iot/Kconfig.defconfig +++ b/soc/arc/snps_arc_iot/Kconfig.defconfig @@ -38,8 +38,4 @@ config UART_NS16550 default y depends on SERIAL -config UART_NS16550_PORT_0 - default y - depends on UART_CONSOLE - endif # ARC_IOT diff --git a/soc/arc/snps_arc_iot/dts_fixup.h b/soc/arc/snps_arc_iot/dts_fixup.h index 2b4f72ee3ff..946357cd4a4 100644 --- a/soc/arc/snps_arc_iot/dts_fixup.h +++ b/soc/arc/snps_arc_iot/dts_fixup.h @@ -13,51 +13,4 @@ #define DT_ICCM_BASE_ADDRESS DT_ARC_ICCM_20000000_BASE_ADDRESS #define DT_ICCM_SIZE (DT_ARC_ICCM_20000000_SIZE >> 10) -/* - * UART configuration - */ -#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_80014000_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_80014000_IRQ_0 -#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_80014000_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_80014000_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_80014000_LABEL -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_80014000_IRQ_0_PRIORITY - -#ifdef DT_NS16550_80014000_DLF -#define DT_UART_NS16550_PORT_0_DLF DT_NS16550_80014000_DLF -#endif - -#define DT_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_80014100_BASE_ADDRESS -#define DT_UART_NS16550_PORT_1_IRQ DT_NS16550_80014100_IRQ_0 -#define DT_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_80014100_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_80014100_CURRENT_SPEED -#define DT_UART_NS16550_PORT_1_NAME DT_NS16550_80014100_LABEL -#define DT_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_80014100_IRQ_0_PRIORITY - -#ifdef DT_NS16550_80014100_DLF -#define DT_UART_NS16550_PORT_1_DLF DT_NS16550_80014100_DLF -#endif - -#define DT_UART_NS16550_PORT_2_BASE_ADDR DT_NS16550_80014200_BASE_ADDRESS -#define DT_UART_NS16550_PORT_2_IRQ DT_NS16550_80014200_IRQ_0 -#define DT_UART_NS16550_PORT_2_CLK_FREQ DT_NS16550_80014200_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_2_BAUD_RATE DT_NS16550_80014200_CURRENT_SPEED -#define DT_UART_NS16550_PORT_2_NAME DT_NS16550_80014200_LABEL -#define DT_UART_NS16550_PORT_2_IRQ_PRI DT_NS16550_80014200_IRQ_0_PRIORITY - -#ifdef DT_NS16550_80014200_DLF -#define DT_UART_NS16550_PORT_2_DLF DT_NS16550_80014200_DLF -#endif - -#define DT_UART_NS16550_PORT_3_BASE_ADDR DT_NS16550_80014300_BASE_ADDRESS -#define DT_UART_NS16550_PORT_3_IRQ DT_NS16550_80014300_IRQ_0 -#define DT_UART_NS16550_PORT_3_CLK_FREQ DT_NS16550_80014300_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_3_BAUD_RATE DT_NS16550_80014300_CURRENT_SPEED -#define DT_UART_NS16550_PORT_3_NAME DT_NS16550_80014300_LABEL -#define DT_UART_NS16550_PORT_3_IRQ_PRI DT_NS16550_80014300_IRQ_0_PRIORITY - -#ifdef DT_NS16550_80014300_DLF -#define DT_UART_NS16550_PORT_3_DLF DT_NS16550_80014300_DLF -#endif - /* End of SoC Level DTS fixup file */ diff --git a/soc/arc/snps_arc_iot/soc.h b/soc/arc/snps_arc_iot/soc.h index 0f1fdd961b9..4d742a598e1 100644 --- a/soc/arc/snps_arc_iot/soc.h +++ b/soc/arc/snps_arc_iot/soc.h @@ -39,13 +39,6 @@ #include #include -/* - * UARTs: UART0 & UART1 & UART2 - */ -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS 0 /* Default */ -#define DT_UART_NS16550_PORT_1_IRQ_FLAGS 0 /* Default */ -#define DT_UART_NS16550_PORT_2_IRQ_FLAGS 0 /* Default */ - #endif /* !_ASMLANGUAGE */ diff --git a/soc/arc/snps_emsdp/dts_fixup.h b/soc/arc/snps_emsdp/dts_fixup.h index 50ea531075a..53f15c0c47c 100644 --- a/soc/arc/snps_emsdp/dts_fixup.h +++ b/soc/arc/snps_emsdp/dts_fixup.h @@ -13,16 +13,6 @@ #define DT_ICCM_BASE_ADDRESS DT_ARC_ICCM_60000000_BASE_ADDRESS #define DT_ICCM_SIZE (DT_ARC_ICCM_60000000_SIZE >> 10) -/* - * UART configuration - */ -#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_F0004000_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_F0004000_IRQ_0 -#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_F0004000_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_F0004000_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_F0004000_LABEL -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_F0004000_IRQ_0_PRIORITY - /* * GPIO configuration */ diff --git a/soc/arc/snps_emsdp/soc.h b/soc/arc/snps_emsdp/soc.h index e691eadf197..068df774dc7 100644 --- a/soc/arc/snps_emsdp/soc.h +++ b/soc/arc/snps_emsdp/soc.h @@ -24,17 +24,9 @@ #ifndef _ASMLANGUAGE - #include #include -/* - * UARTs: UART0 & UART1 & UART2 - */ -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS 0 /* Default */ - - - #endif /* !_ASMLANGUAGE */ #endif /* _SOC_H_ */ diff --git a/soc/arc/snps_emsk/dts_fixup.h b/soc/arc/snps_emsk/dts_fixup.h index 87b91857b11..0b02cfb2dc0 100644 --- a/soc/arc/snps_emsk/dts_fixup.h +++ b/soc/arc/snps_emsk/dts_fixup.h @@ -12,30 +12,6 @@ #define DT_DDR_BASE_ADDRESS DT_MMIO_SRAM_10000000_BASE_ADDRESS #define DT_DDR_SIZE (DT_MMIO_SRAM_10000000_SIZE >> 10) -/* - * UART configuration - */ -#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_F0008000_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_F0008000_IRQ_0 -#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_F0008000_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_F0008000_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_F0008000_LABEL -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_F0008000_IRQ_0_PRIORITY - -#define DT_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_F0009000_BASE_ADDRESS -#define DT_UART_NS16550_PORT_1_IRQ DT_NS16550_F0009000_IRQ_0 -#define DT_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_F0009000_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_F0009000_CURRENT_SPEED -#define DT_UART_NS16550_PORT_1_NAME DT_NS16550_F0009000_LABEL -#define DT_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_F0009000_IRQ_0_PRIORITY - -#define DT_UART_NS16550_PORT_2_BASE_ADDR DT_NS16550_F000A000_BASE_ADDRESS -#define DT_UART_NS16550_PORT_2_IRQ DT_NS16550_F000A000_IRQ_0 -#define DT_UART_NS16550_PORT_2_CLK_FREQ DT_NS16550_F000A000_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_2_BAUD_RATE DT_NS16550_F000A000_CURRENT_SPEED -#define DT_UART_NS16550_PORT_2_NAME DT_NS16550_F000A000_LABEL -#define DT_UART_NS16550_PORT_2_IRQ_PRI DT_NS16550_F000A000_IRQ_0_PRIORITY - /* * GPIO configuration */ diff --git a/soc/arc/snps_emsk/soc.h b/soc/arc/snps_emsk/soc.h index 03f32a3389f..7fa7d4c4de1 100644 --- a/soc/arc/snps_emsk/soc.h +++ b/soc/arc/snps_emsk/soc.h @@ -45,13 +45,6 @@ #define INT_ENABLE_ARC ~(0x00000001 << 8) #define INT_ENABLE_ARC_BIT_POS (8) -/* - * UARTs: UART0 & UART1 & UART2 - */ -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS 0 /* Default */ -#define DT_UART_NS16550_PORT_1_IRQ_FLAGS 0 /* Default */ -#define DT_UART_NS16550_PORT_2_IRQ_FLAGS 0 /* Default */ - #ifndef CONFIG_HAS_DTS /* I2C */ /* I2C_0 is on Pmod2 connector */ diff --git a/soc/arc/snps_emsk/soc_config.c b/soc/arc/snps_emsk/soc_config.c index c13d42c8c23..6974e2c2803 100644 --- a/soc/arc/snps_emsk/soc_config.c +++ b/soc/arc/snps_emsk/soc_config.c @@ -18,14 +18,14 @@ static int uart_ns16550_init(struct device *dev) /* On ARC EM Starter kit board, * send the UART the command to clear the interrupt */ -#ifdef CONFIG_UART_NS16550_PORT_0 - sys_write32(0, DT_UART_NS16550_PORT_0_BASE_ADDR+0x4); - sys_write32(0, DT_UART_NS16550_PORT_0_BASE_ADDR+0x10); -#endif /* CONFIG_UART_NS16550_PORT_0 */ -#ifdef CONFIG_UART_NS16550_PORT_1 - sys_write32(0, DT_UART_NS16550_PORT_1_BASE_ADDR+0x4); - sys_write32(0, DT_UART_NS16550_PORT_1_BASE_ADDR+0x10); -#endif /* CONFIG_UART_NS16550_PORT_1 */ +#ifdef DT_INST_0_NS16650 + sys_write32(0, DT_INST_0_NS16550_BASE_ADDRESS+0x4); + sys_write32(0, DT_INST_0_NS16550_BASE_ADDRESS+0x10); +#endif /* DT_INST_0_NS16650 */ +#ifdef DT_INST_1_NS16650 + sys_write32(0, DT_INST_1_NS16550_BASE_ADDRESS+0x4); + sys_write32(0, DT_INST_1_NS16550_BASE_ADDRESS+0x10); +#endif /* DT_INST_1_NS16650 */ return 0; } diff --git a/soc/arm/bcm_vk/valkyrie/dts_fixup.h b/soc/arm/bcm_vk/valkyrie/dts_fixup.h index 66565cfec6d..6a1c28893ea 100644 --- a/soc/arm/bcm_vk/valkyrie/dts_fixup.h +++ b/soc/arm/bcm_vk/valkyrie/dts_fixup.h @@ -8,18 +8,4 @@ #define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define DT_NUM_MPU_REGIONS DT_ARM_ARMV7M_MPU_E000ED90_ARM_NUM_MPU_REGIONS -#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_40020000_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_40020000_LABEL -#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_40020000_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_40020000_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_40020000_IRQ_0 -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_40020000_IRQ_0_PRIORITY - -#define DT_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_48100000_BASE_ADDRESS -#define DT_UART_NS16550_PORT_1_NAME DT_NS16550_48100000_LABEL -#define DT_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_48100000_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_48100000_CURRENT_SPEED -#define DT_UART_NS16550_PORT_1_IRQ DT_NS16550_48100000_IRQ_0 -#define DT_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_48100000_IRQ_0_PRIORITY - /* End of SoC Level DTS fixup file */ diff --git a/soc/arm/bcm_vk/valkyrie/soc.h b/soc/arm/bcm_vk/valkyrie/soc.h index 07cfa3b72e0..b3127405eae 100644 --- a/soc/arm/bcm_vk/valkyrie/soc.h +++ b/soc/arm/bcm_vk/valkyrie/soc.h @@ -282,10 +282,4 @@ typedef enum IRQn { #define __MPU_PRESENT 1 #define __NVIC_PRIO_BITS DT_NUM_IRQ_PRIO_BITS -/* CRMU UART */ -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS 0 - -/* CHIP COMMON UART 0 */ -#define DT_UART_NS16550_PORT_1_IRQ_FLAGS 0 - #endif diff --git a/soc/arm/microchip_mec/mec1501/dts_fixup.h b/soc/arm/microchip_mec/mec1501/dts_fixup.h index 42c0cbc3d8d..c42be4bbc12 100644 --- a/soc/arm/microchip_mec/mec1501/dts_fixup.h +++ b/soc/arm/microchip_mec/mec1501/dts_fixup.h @@ -21,36 +21,6 @@ #define DT_NS16550_REG_SHIFT DT_NS16550_400F2C00_REG_SHIFT #endif -#define DT_UART_NS16550_PORT_0_BASE_ADDR \ - DT_NS16550_400F2400_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_CLK_FREQ 1843200 -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_400F2400_LABEL -#define DT_UART_NS16550_PORT_0_BAUD_RATE \ - DT_NS16550_400F2400_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_400F2400_IRQ_0 -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_400F2400_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS 0 /* Deault */ - -#define DT_UART_NS16550_PORT_1_BASE_ADDR \ - DT_NS16550_400F2800_BASE_ADDRESS -#define DT_UART_NS16550_PORT_1_CLK_FREQ 1843200 -#define DT_UART_NS16550_PORT_1_NAME DT_NS16550_400F2800_LABEL -#define DT_UART_NS16550_PORT_1_BAUD_RATE \ - DT_NS16550_400F2800_CURRENT_SPEED -#define DT_UART_NS16550_PORT_1_IRQ DT_NS16550_400F2800_IRQ_0 -#define DT_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_400F2800_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_1_IRQ_FLAGS 0 /* Default */ - -#define DT_UART_NS16550_PORT_2_BASE_ADDR \ - DT_NS16550_400F2C00_BASE_ADDRESS -#define DT_UART_NS16550_PORT_2_CLK_FREQ 1843200 -#define DT_UART_NS16550_PORT_2_NAME DT_NS16550_400F2C00_LABEL -#define DT_UART_NS16550_PORT_2_BAUD_RATE \ - DT_NS16550_400F2C00_CURRENT_SPEED -#define DT_UART_NS16550_PORT_2_IRQ DT_NS16550_400F2C00_IRQ_0 -#define DT_UART_NS16550_PORT_2_IRQ_PRI DT_NS16550_400F2C00_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_2_IRQ_FLAGS 0 /* Default */ - /* Pin multiplexing and GPIOs share the same registers in the HW */ #define DT_PINMUX_XEC_GPIO000_036_BASE_ADDR DT_GPIO_XEC_GPIO000_036_BASE_ADDR #define DT_PINMUX_XEC_GPIO040_076_BASE_ADDR DT_GPIO_XEC_GPIO040_076_BASE_ADDR diff --git a/soc/arm/microchip_mec/mec1701/dts_fixup.h b/soc/arm/microchip_mec/mec1701/dts_fixup.h index 69766e4d597..6e82fd65b11 100644 --- a/soc/arm/microchip_mec/mec1701/dts_fixup.h +++ b/soc/arm/microchip_mec/mec1701/dts_fixup.h @@ -8,25 +8,3 @@ #define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS - -#if defined(DT_NS16550_400F2400_REG_SHIFT) -#define DT_NS16550_REG_SHIFT DT_NS16550_400F2400_REG_SHIFT -#elif defined(DT_NS16550_400F2800_REG_SHIFT) -#define DT_NS16550_REG_SHIFT DT_NS16550_400F2800_REG_SHIFT -#endif - -#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_400F2400_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_CLK_FREQ 1843200 -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_400F2400_LABEL -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_400F2400_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_400F2400_IRQ_0 -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_400F2400_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS 0 /* Deault */ - -#define DT_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_400F2800_BASE_ADDRESS -#define DT_UART_NS16550_PORT_1_CLK_FREQ 1843200 -#define DT_UART_NS16550_PORT_1_NAME DT_NS16550_400F2800_LABEL -#define DT_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_400F2800_CURRENT_SPEED -#define DT_UART_NS16550_PORT_1_IRQ DT_NS16550_400F2800_IRQ_0 -#define DT_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_400F2800_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_1_IRQ_FLAGS 0 /* Default */ diff --git a/soc/nios2/nios2-qemu/dts_fixup.h b/soc/nios2/nios2-qemu/dts_fixup.h index a6b41b5e23a..a9950c3db4a 100644 --- a/soc/nios2/nios2-qemu/dts_fixup.h +++ b/soc/nios2/nios2-qemu/dts_fixup.h @@ -1,9 +1,5 @@ /* SPDX-License-Identifier: Apache-2.0 */ -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_440000_CURRENT_SPEED - -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_440000_LABEL - #define _RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define _RAM_SIZE (CONFIG_SRAM_SIZE * 1024) diff --git a/soc/nios2/nios2-qemu/soc.h b/soc/nios2/nios2-qemu/soc.h index c1329016409..d078efc3e1c 100644 --- a/soc/nios2/nios2-qemu/soc.h +++ b/soc/nios2/nios2-qemu/soc.h @@ -10,8 +10,7 @@ #include -#define DT_UART_NS16550_PORT_0_BASE_ADDR A_16550_UART_0_BASE -#define DT_UART_NS16550_PORT_0_IRQ A_16550_UART_0_IRQ -#define DT_UART_NS16550_PORT_0_CLK_FREQ A_16550_UART_0_FREQ +/* Move to DTS once interrupt controller is defined there */ +#define DT_INST_0_NS16550_IRQ_0 A_16550_UART_0_IRQ #endif diff --git a/soc/nios2/nios2f-zephyr/Kconfig.defconfig b/soc/nios2/nios2f-zephyr/Kconfig.defconfig index 6cc21e38cf0..3ffa3f9e14b 100644 --- a/soc/nios2/nios2f-zephyr/Kconfig.defconfig +++ b/soc/nios2/nios2f-zephyr/Kconfig.defconfig @@ -23,11 +23,4 @@ config ALTERA_AVALON_MSGDMA def_bool y depends on DMA_NIOS2_MSGDMA -if UART_NS16550 - -config UART_NS16550_PORT_0 - default y - -endif # UART_NS16550 - endif # SOC_NIOS2F_ZEPHYR diff --git a/soc/nios2/nios2f-zephyr/dts_fixup.h b/soc/nios2/nios2f-zephyr/dts_fixup.h index 8e80cf2e460..a9950c3db4a 100644 --- a/soc/nios2/nios2f-zephyr/dts_fixup.h +++ b/soc/nios2/nios2f-zephyr/dts_fixup.h @@ -1,9 +1,5 @@ /* SPDX-License-Identifier: Apache-2.0 */ -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_F0008000_CURRENT_SPEED - -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_F0008000_LABEL - #define _RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define _RAM_SIZE (CONFIG_SRAM_SIZE * 1024) diff --git a/soc/nios2/nios2f-zephyr/soc.h b/soc/nios2/nios2f-zephyr/soc.h index aebdc583934..6f7bab482a5 100644 --- a/soc/nios2/nios2f-zephyr/soc.h +++ b/soc/nios2/nios2f-zephyr/soc.h @@ -10,8 +10,7 @@ #include -#define DT_UART_NS16550_PORT_0_BASE_ADDR A_16550_UART_0_BASE -#define DT_UART_NS16550_PORT_0_IRQ A_16550_UART_0_IRQ -#define DT_UART_NS16550_PORT_0_CLK_FREQ A_16550_UART_0_FREQ +/* Move to DTS once interrupt controller is defined there */ +#define DT_INST_0_NS16550_IRQ_0 A_16550_UART_0_IRQ #endif diff --git a/soc/x86/apollo_lake/dts_fixup.h b/soc/x86/apollo_lake/dts_fixup.h index f3698f12b86..8ae1017d6da 100644 --- a/soc/x86/apollo_lake/dts_fixup.h +++ b/soc/x86/apollo_lake/dts_fixup.h @@ -11,60 +11,4 @@ #define DT_RAM_SIZE CONFIG_SRAM_SIZE #define DT_ROM_SIZE CONFIG_FLASH_SIZE -#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_INST_0_NS16550_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_SIZE DT_INST_0_NS16550_SIZE -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_INST_0_NS16550_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_NAME DT_INST_0_NS16550_LABEL -#define DT_UART_NS16550_PORT_0_IRQ DT_INST_0_NS16550_IRQ_0 -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_INST_0_NS16550_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS DT_INST_0_NS16550_IRQ_0_SENSE -#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_INST_0_NS16550_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_0_PCIE DT_INST_0_NS16550_PCIE - -#ifdef DT_NS16550_0_PCP -#define DT_UART_NS16550_PORT_0_PCP DT_NS16550_0_PCP -#endif - -#define DT_UART_NS16550_PORT_1_BASE_ADDR DT_INST_1_NS16550_BASE_ADDRESS -#define DT_UART_NS16550_PORT_1_SIZE DT_INST_1_NS16550_SIZE -#define DT_UART_NS16550_PORT_1_BAUD_RATE DT_INST_1_NS16550_CURRENT_SPEED -#define DT_UART_NS16550_PORT_1_NAME DT_INST_1_NS16550_LABEL -#define DT_UART_NS16550_PORT_1_IRQ DT_INST_1_NS16550_IRQ_0 -#define DT_UART_NS16550_PORT_1_IRQ_PRI DT_INST_1_NS16550_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_1_IRQ_FLAGS DT_INST_1_NS16550_IRQ_0_SENSE -#define DT_UART_NS16550_PORT_1_CLK_FREQ DT_INST_1_NS16550_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_1_PCIE DT_INST_1_NS16550_PCIE - -#ifdef DT_NS16550_1_PCP -#define DT_UART_NS16550_PORT_1_PCP DT_NS16550_1_PCP -#endif - -#define DT_UART_NS16550_PORT_2_BASE_ADDR DT_INST_2_NS16550_BASE_ADDRESS -#define DT_UART_NS16550_PORT_2_SIZE DT_INST_2_NS16550_SIZE -#define DT_UART_NS16550_PORT_2_BAUD_RATE DT_INST_2_NS16550_CURRENT_SPEED -#define DT_UART_NS16550_PORT_2_NAME DT_INST_2_NS16550_LABEL -#define DT_UART_NS16550_PORT_2_IRQ DT_INST_2_NS16550_IRQ_0 -#define DT_UART_NS16550_PORT_2_IRQ_PRI DT_INST_2_NS16550_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_2_IRQ_FLAGS DT_INST_2_NS16550_IRQ_0_SENSE -#define DT_UART_NS16550_PORT_2_CLK_FREQ DT_INST_2_NS16550_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_2_PCIE DT_INST_2_NS16550_PCIE - -#ifdef DT_NS16550_2_PCP -#define DT_UART_NS16550_PORT_2_PCP DT_NS16550_2_PCP -#endif - -#define DT_UART_NS16550_PORT_3_BASE_ADDR DT_INST_3_NS16550_BASE_ADDRESS -#define DT_UART_NS16550_PORT_3_SIZE DT_INST_3_NS16550_SIZE -#define DT_UART_NS16550_PORT_3_BAUD_RATE DT_INST_3_NS16550_CURRENT_SPEED -#define DT_UART_NS16550_PORT_3_NAME DT_INST_3_NS16550_LABEL -#define DT_UART_NS16550_PORT_3_IRQ DT_INST_3_NS16550_IRQ_0 -#define DT_UART_NS16550_PORT_3_IRQ_PRI DT_INST_3_NS16550_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_3_IRQ_FLAGS DT_INST_3_NS16550_IRQ_0_SENSE -#define DT_UART_NS16550_PORT_3_CLK_FREQ DT_INST_3_NS16550_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_3_PCIE DT_INST_3_NS16550_PCIE - -#ifdef DT_NS16550_3_PCP -#define DT_UART_NS16550_PORT_3_PCP DT_NS16550_3_PCP -#endif - /* End of SoC Level DTS fixup file */ diff --git a/soc/x86/apollo_lake/soc.c b/soc/x86/apollo_lake/soc.c index fa3222ed88b..a0d024fee97 100644 --- a/soc/x86/apollo_lake/soc.c +++ b/soc/x86/apollo_lake/soc.c @@ -31,30 +31,26 @@ MMU_BOOT_REGION(DT_INST_0_INTEL_HPET_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE); #endif /* CONFIG_HPET_TIMER */ /* for UARTs */ -#ifdef CONFIG_UART_NS16550 - -#ifdef CONFIG_UART_NS16550_PORT_0 -MMU_BOOT_REGION(DT_UART_NS16550_PORT_0_BASE_ADDR, 0x1000, +#ifdef DT_INST_0_NS16550 +MMU_BOOT_REGION(DT_INST_0_NS16550_BASE_ADDRESS, 0x1000, (MMU_ENTRY_READ | MMU_ENTRY_WRITE)); #endif -#ifdef CONFIG_UART_NS16550_PORT_1 -MMU_BOOT_REGION(DT_UART_NS16550_PORT_1_BASE_ADDR, 0x1000, +#ifdef DT_INST_1_NS16550 +MMU_BOOT_REGION(DT_INST_1_NS16550_BASE_ADDRESS, 0x1000, (MMU_ENTRY_READ | MMU_ENTRY_WRITE)); #endif -#ifdef CONFIG_UART_NS16550_PORT_2 -MMU_BOOT_REGION(DT_UART_NS16550_PORT_2_BASE_ADDR, 0x1000, +#ifdef DT_INST_2_NS16550 +MMU_BOOT_REGION(DT_INST_2_NS16550_BASE_ADDRESS, 0x1000, (MMU_ENTRY_READ | MMU_ENTRY_WRITE)); #endif -#ifdef CONFIG_UART_NS16550_PORT_3 -MMU_BOOT_REGION(DT_UART_NS16550_PORT_3_BASE_ADDR, 0x1000, +#ifdef DT_INST_3_NS16550 +MMU_BOOT_REGION(DT_INST_3_NS16550_BASE_ADDRESS, 0x1000, (MMU_ENTRY_READ | MMU_ENTRY_WRITE)); #endif -#endif /* CONFIG_UART_NS16550 */ - /* for I2C controllers */ #ifdef CONFIG_I2C diff --git a/soc/x86/atom/Kconfig.defconfig b/soc/x86/atom/Kconfig.defconfig index 43077a4f5c3..d6db126eab9 100644 --- a/soc/x86/atom/Kconfig.defconfig +++ b/soc/x86/atom/Kconfig.defconfig @@ -15,16 +15,6 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC config CLFLUSH_DETECT default y if CACHE_FLUSHING -if UART_NS16550 - -config UART_NS16550_PORT_0 - default y - -config UART_NS16550_PORT_1 - default y - -endif # UART_NS16550 - if BT_UART config UART_PIPE_ON_DEV_NAME diff --git a/soc/x86/atom/dts_fixup.h b/soc/x86/atom/dts_fixup.h index 70743cc719a..463429257ea 100644 --- a/soc/x86/atom/dts_fixup.h +++ b/soc/x86/atom/dts_fixup.h @@ -2,22 +2,6 @@ /* SoC level DTS fixup file */ -#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_3F8_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_3F8_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_3F8_LABEL -#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_3F8_IRQ_0 -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_3F8_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS DT_NS16550_3F8_IRQ_0_SENSE -#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_3F8_CLOCK_FREQUENCY - -#define DT_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_2F8_BASE_ADDRESS -#define DT_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_2F8_CURRENT_SPEED -#define DT_UART_NS16550_PORT_1_NAME DT_NS16550_2F8_LABEL -#define DT_UART_NS16550_PORT_1_IRQ DT_NS16550_2F8_IRQ_0 -#define DT_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_2F8_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_1_IRQ_FLAGS DT_NS16550_2F8_IRQ_0_SENSE -#define DT_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_2F8_CLOCK_FREQUENCY - #define DT_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define DT_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS diff --git a/soc/x86/ia32/Kconfig.defconfig b/soc/x86/ia32/Kconfig.defconfig index e9f831c8790..fde91eedc35 100644 --- a/soc/x86/ia32/Kconfig.defconfig +++ b/soc/x86/ia32/Kconfig.defconfig @@ -15,14 +15,4 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC config CLFLUSH_DETECT default y if CACHE_FLUSHING -if UART_NS16550 - -config UART_NS16550_PORT_0 - default y - -config UART_NS16550_PORT_1 - default y - -endif # UART_NS16550 - endif diff --git a/soc/x86/ia32/dts_fixup.h b/soc/x86/ia32/dts_fixup.h index 70743cc719a..463429257ea 100644 --- a/soc/x86/ia32/dts_fixup.h +++ b/soc/x86/ia32/dts_fixup.h @@ -2,22 +2,6 @@ /* SoC level DTS fixup file */ -#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_3F8_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_3F8_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_3F8_LABEL -#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_3F8_IRQ_0 -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_3F8_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS DT_NS16550_3F8_IRQ_0_SENSE -#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_3F8_CLOCK_FREQUENCY - -#define DT_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_2F8_BASE_ADDRESS -#define DT_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_2F8_CURRENT_SPEED -#define DT_UART_NS16550_PORT_1_NAME DT_NS16550_2F8_LABEL -#define DT_UART_NS16550_PORT_1_IRQ DT_NS16550_2F8_IRQ_0 -#define DT_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_2F8_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_1_IRQ_FLAGS DT_NS16550_2F8_IRQ_0_SENSE -#define DT_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_2F8_CLOCK_FREQUENCY - #define DT_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define DT_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS diff --git a/soc/xtensa/intel_s1000/dts_fixup.h b/soc/xtensa/intel_s1000/dts_fixup.h index b9890adf0ea..ca6e85458d4 100644 --- a/soc/xtensa/intel_s1000/dts_fixup.h +++ b/soc/xtensa/intel_s1000/dts_fixup.h @@ -4,14 +4,6 @@ #define DT_CPU_CLOCK_FREQUENCY DT_CADENCE_TENSILICA_XTENSA_LX6_0_CLOCK_FREQUENCY -#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_80800_BASE_ADDRESS -#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_80800_CURRENT_SPEED -#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_80800_LABEL -#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_80800_IRQ_0 -#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_80800_IRQ_0_PRIORITY -#define DT_UART_NS16550_PORT_0_IRQ_FLAGS DT_NS16550_80800_IRQ_0_SENSE -#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_80800_CLOCK_FREQUENCY - #define DT_L2_SRAM_BASE CONFIG_SRAM_BASE_ADDRESS #define DT_L2_SRAM_SIZE CONFIG_SRAM_SIZE * 1024