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disk: Move variable from config to data struct in nxp usdhc driver

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Moves the source clock frequency variable in the nxp usdhc driver from
the config structure to the data structure in preparation for removing
the writable copy of the config structure.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2020-06-29 08:15:18 -05:00 • committed by Kumar Gala
commit 6fa92fe7da
1 changed files with 9 additions and 9 deletions
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18
subsys/disk/disk_access_usdhc.c
View file

@ -409,7 +409,6 @@ struct usdhc_config {
uint8_t write_burst_len; uint8_t write_burst_len;
/* Write burst len /* Write burst len
*/ */
uint32_t src_clk_hz;
}; };
struct usdhc_capability { struct usdhc_capability {
@ -462,6 +461,7 @@ struct usdhc_priv {
bool inserted; bool inserted;
struct device *clock_dev; struct device *clock_dev;
uint32_t src_clk_hz;
struct usdhc_config host_config; struct usdhc_config host_config;
struct usdhc_capability host_capability; struct usdhc_capability host_capability;
@ -1919,7 +1919,7 @@ static int usdhc_select_bus_timing(struct usdhc_priv *priv)
SD_TIMING_SDR25_HIGH_SPEED_MODE; SD_TIMING_SDR25_HIGH_SPEED_MODE;
priv->card_info.busclk_hz = priv->card_info.busclk_hz =
usdhc_set_sd_clk(priv->host_config.base, usdhc_set_sd_clk(priv->host_config.base,
priv->host_config.src_clk_hz, priv->src_clk_hz,
SD_CLOCK_50MHZ); SD_CLOCK_50MHZ);
} else if (error == -ENOTSUP) { } else if (error == -ENOTSUP) {
/* if not support high speed, /* if not support high speed,
@ -1951,7 +1951,7 @@ static int usdhc_select_bus_timing(struct usdhc_priv *priv)
SD_TIMING_SDR104_MODE; SD_TIMING_SDR104_MODE;
priv->card_info.busclk_hz = priv->card_info.busclk_hz =
usdhc_set_sd_clk(priv->host_config.base, usdhc_set_sd_clk(priv->host_config.base,
priv->host_config.src_clk_hz, priv->src_clk_hz,
SDMMCHOST_SUPPORT_SDR104_FREQ); SDMMCHOST_SUPPORT_SDR104_FREQ);
break; break;
} }
@ -1964,7 +1964,7 @@ static int usdhc_select_bus_timing(struct usdhc_priv *priv)
priv->card_info.busclk_hz = priv->card_info.busclk_hz =
usdhc_set_sd_clk( usdhc_set_sd_clk(
priv->host_config.base, priv->host_config.base,
priv->host_config.src_clk_hz, priv->src_clk_hz,
SD_CLOCK_50MHZ); SD_CLOCK_50MHZ);
usdhc_enable_ddr_mode( usdhc_enable_ddr_mode(
priv->host_config.base, true, 0U); priv->host_config.base, true, 0U);
@ -1980,7 +1980,7 @@ static int usdhc_select_bus_timing(struct usdhc_priv *priv)
priv->card_info.busclk_hz = priv->card_info.busclk_hz =
usdhc_set_sd_clk( usdhc_set_sd_clk(
priv->host_config.base, priv->host_config.base,
priv->host_config.src_clk_hz, priv->src_clk_hz,
SD_CLOCK_100MHZ); SD_CLOCK_100MHZ);
} }
break; break;
@ -1993,7 +1993,7 @@ static int usdhc_select_bus_timing(struct usdhc_priv *priv)
priv->card_info.busclk_hz = priv->card_info.busclk_hz =
usdhc_set_sd_clk( usdhc_set_sd_clk(
priv->host_config.base, priv->host_config.base,
priv->host_config.src_clk_hz, priv->src_clk_hz,
SD_CLOCK_50MHZ); SD_CLOCK_50MHZ);
} }
break; break;
@ -2309,7 +2309,7 @@ static int usdhc_sd_init(struct usdhc_priv *priv)
usdhc_set_bus_width(base, USDHC_DATA_BUS_WIDTH_1BIT); usdhc_set_bus_width(base, USDHC_DATA_BUS_WIDTH_1BIT);
/*set card freq to 400KHZ at begging*/ /*set card freq to 400KHZ at begging*/
priv->card_info.busclk_hz = priv->card_info.busclk_hz =
usdhc_set_sd_clk(base, priv->host_config.src_clk_hz, usdhc_set_sd_clk(base, priv->src_clk_hz,
SDMMC_CLOCK_400KHZ); SDMMC_CLOCK_400KHZ);
/* send card active */ /* send card active */
ret = usdhc_set_sd_active(base); ret = usdhc_set_sd_active(base);
@ -2515,7 +2515,7 @@ APP_SEND_OP_COND_AGAIN:
/* Set to max frequency in non-high speed mode. */ /* Set to max frequency in non-high speed mode. */
priv->card_info.busclk_hz = usdhc_set_sd_clk(base, priv->card_info.busclk_hz = usdhc_set_sd_clk(base,
priv->host_config.src_clk_hz, SD_CLOCK_25MHZ); priv->src_clk_hz, SD_CLOCK_25MHZ);
/* Set to 4-bit data bus mode. */ /* Set to 4-bit data bus mode. */
if ((priv->host_capability.host_flags & USDHC_SUPPORT_4BIT_FLAG) && if ((priv->host_capability.host_flags & USDHC_SUPPORT_4BIT_FLAG) &&
@ -2683,7 +2683,7 @@ static int usdhc_access_init(const struct device *dev)
if (clock_control_get_rate(priv->clock_dev, if (clock_control_get_rate(priv->clock_dev,
priv->host_config.clock_subsys, priv->host_config.clock_subsys,
&priv->host_config.src_clk_hz)) { &priv->src_clk_hz)) {
return -EINVAL; return -EINVAL;
} }