boards: st: stm32n6570_dk: configure and enable sdmmc2
Configure and enable SDMMC2 for the STM32N6570-DK. Also configure and enable the PLL2 and the IC4 to use them as a 48MHz source clock for the SDMMC. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
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@ -87,6 +87,12 @@ Default Zephyr Peripheral Mapping:
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- I2C4_SDA : PE14
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- LD1 : PO1
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- LD2 : PG10
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- SDMMC2_CK : PC2
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- SDMMC2_CMD : PC3
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- SDMMC2_D0 : PC4
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- SDMMC2_D1 : PC5
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- SDMMC2_D2 : PC0
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- SDMMC2_D3 : PE4
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- SPI5_SCK : PE15
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- SPI5_MOSI : PG2
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- SPI5_MISO : PH8
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@ -59,6 +59,15 @@
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status = "okay";
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};
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&pll2 {
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clocks = <&clk_hsi>;
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div-m = <4>;
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mul-n = <24>;
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div-p1 = <2>;
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div-p2 = <2>;
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status = "okay";
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};
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&ic1 {
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pll-src = <1>;
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ic-div = <2>;
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@ -71,6 +80,12 @@
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status = "okay";
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};
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&ic4 {
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pll-src = <2>;
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ic-div = <2>;
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status = "okay";
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};
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&ic6 {
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pll-src = <1>;
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ic-div = <2>;
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@ -140,6 +155,19 @@
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status = "okay";
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};
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&sdmmc2 {
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status = "okay";
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clocks = <&rcc STM32_CLOCK(AHB5, 7)>,
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<&rcc STM32_SRC_IC4 SDMMC2_SEL(2)>;
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pinctrl-0 = <&sdmmc2_d0_pc4 &sdmmc2_d1_pc5
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&sdmmc2_d2_pc0 &sdmmc2_d3_pe4
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&sdmmc2_ck_pc2 &sdmmc2_cmd_pc3>;
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pinctrl-names = "default";
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bus-width = <4>;
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cd-gpios = <&gpion 8 GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpioq 7 GPIO_ACTIVE_HIGH>;
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};
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&spi5 {
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clocks = <&rcc STM32_CLOCK(APB2, 20)>,
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<&rcc STM32_SRC_CKPER SPI5_SEL(1)>;
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