From 6e272b14bd2cf1dda9a00f2f62e3761a4c92ff83 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Mon, 9 Oct 2017 14:42:43 +0200 Subject: [PATCH] dts: stm32: fix dependency between stm32f405 and stm32f407 stm32f407 SoC is an extension of stm32f405 SoC with additional support of ethernet and DCMI. Hence, in dts description, this should be represented by stm32f407.dtsi including stm32f405.dtsi. The opposite was proposed today in stm32 .dtsi files. This commit fixes the inclusion model and renames stm32f407-pinctrl.dtsi into stm32f405-pinctrl.dtsi Signed-off-by: Erwan Gouriou --- ...07-pinctrl.dtsi => stm32f405-pinctrl.dtsi} | 0 dts/arm/st/stm32f405.dtsi | 39 +++++++++++++++++- dts/arm/st/stm32f407.dtsi | 40 +------------------ 3 files changed, 39 insertions(+), 40 deletions(-) rename dts/arm/st/{stm32f407-pinctrl.dtsi => stm32f405-pinctrl.dtsi} (100%) diff --git a/dts/arm/st/stm32f407-pinctrl.dtsi b/dts/arm/st/stm32f405-pinctrl.dtsi similarity index 100% rename from dts/arm/st/stm32f407-pinctrl.dtsi rename to dts/arm/st/stm32f405-pinctrl.dtsi diff --git a/dts/arm/st/stm32f405.dtsi b/dts/arm/st/stm32f405.dtsi index 51a97491098..0c5c6c11e89 100644 --- a/dts/arm/st/stm32f405.dtsi +++ b/dts/arm/st/stm32f405.dtsi @@ -1,8 +1,43 @@ /* - * Copyright (c) 2017 Erwin Rol + * Copyright (c) 2017 Linaro Limited * * SPDX-License-Identifier: Apache-2.0 */ -#include +#include +#include +/ { + soc { + pinctrl: pin-controller { + reg = <0x40020000 0x2800>; + }; + + usart3: serial@40004800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>; + interrupts = <39 0>; + status = "disabled"; + label = "UART_3"; + }; + + uart4: serial@40004c00 { + compatible ="st,stm32-uart"; + reg = <0x40004c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; + interrupts = <52 0>; + status = "disabled"; + label = "UART_4"; + }; + + uart5: serial@40005000 { + compatible = "st,stm32-uart"; + reg = <0x40005000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; + interrupts = <53 0>; + status = "disabled"; + label = "UART_5"; + }; + }; +}; diff --git a/dts/arm/st/stm32f407.dtsi b/dts/arm/st/stm32f407.dtsi index 6d12cd09d3f..688dcecea6f 100644 --- a/dts/arm/st/stm32f407.dtsi +++ b/dts/arm/st/stm32f407.dtsi @@ -1,43 +1,7 @@ /* - * Copyright (c) 2017 Linaro Limited + * Copyright (c) 2017 Erwin Rol * * SPDX-License-Identifier: Apache-2.0 */ -#include -#include - -/ { - soc { - pinctrl: pin-controller { - reg = <0x40020000 0x2800>; - }; - - usart3: serial@40004800 { - compatible = "st,stm32-usart", "st,stm32-uart"; - reg = <0x40004800 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>; - interrupts = <39 0>; - status = "disabled"; - label = "UART_3"; - }; - - uart4: serial@40004c00 { - compatible ="st,stm32-uart"; - reg = <0x40004c00 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; - interrupts = <52 0>; - status = "disabled"; - label = "UART_4"; - }; - - uart5: serial@40005000 { - compatible = "st,stm32-uart"; - reg = <0x40005000 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; - interrupts = <53 0>; - status = "disabled"; - label = "UART_5"; - }; - }; -}; +#include