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mimxrt1050_evk: cache enable

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Cacheing mechanisms enabled and non-cache area added.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This commit is contained in:
Andrei Gansari 2019-01-31 12:34:26 +02:00 • committed by Maureen Helm
commit 6d36f2e2f4
4 changed files with 17 additions and 0 deletions
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2
drivers/ethernet/Kconfig.mcux
View file

@ -7,6 +7,8 @@
menuconfig ETH_MCUX menuconfig ETH_MCUX
bool "MCUX Ethernet driver" bool "MCUX Ethernet driver"
depends on HAS_MCUX_ENET depends on HAS_MCUX_ENET
select NOCACHE_MEMORY if HAS_MCUX_CACHE
select ARM_MPU if CPU_CORTEX_M7
help help
Enable MCUX Ethernet driver. Note, this driver performs one shot PHY Enable MCUX Ethernet driver. Note, this driver performs one shot PHY
setup. There is no support for PHY disconnect, reconnect or setup. There is no support for PHY disconnect, reconnect or

5
ext/hal/nxp/mcux/Kconfig
View file

@ -17,6 +17,11 @@ config HAS_MCUX_ADC16
help help
Set if the 16-bit ADC (ADC16) module is present in the SoC. Set if the 16-bit ADC (ADC16) module is present in the SoC.
config HAS_MCUX_CACHE
bool
help
Set if the L1 or L2 cache is present in the SoC.
config HAS_MCUX_CCM config HAS_MCUX_CCM
bool bool
help help

5
ext/hal/nxp/mcux/drivers/imx/CMakeLists.txt
View file

@ -10,6 +10,11 @@ zephyr_library_compile_definitions_ifdef(
CONFIG_PTP_CLOCK_MCUX ENET_ENHANCEDBUFFERDESCRIPTOR_MODE CONFIG_PTP_CLOCK_MCUX ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
) )
zephyr_library_compile_definitions_ifdef(
CONFIG_HAS_MCUX_CACHE FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL
)
zephyr_sources_ifdef(CONFIG_HAS_MCUX_CACHE fsl_cache.c)
zephyr_sources_ifdef(CONFIG_GPIO_MCUX_IGPIO fsl_gpio.c) zephyr_sources_ifdef(CONFIG_GPIO_MCUX_IGPIO fsl_gpio.c)
zephyr_sources_ifdef(CONFIG_I2C_MCUX_LPI2C fsl_lpi2c.c) zephyr_sources_ifdef(CONFIG_I2C_MCUX_LPI2C fsl_lpi2c.c)
zephyr_sources_ifdef(CONFIG_SPI_MCUX_LPSPI fsl_lpspi.c) zephyr_sources_ifdef(CONFIG_SPI_MCUX_LPSPI fsl_lpspi.c)

5
soc/arm/nxp_imx/rt/Kconfig.soc
View file

@ -12,6 +12,7 @@ depends on SOC_SERIES_IMX_RT
config SOC_MIMXRT1021 config SOC_MIMXRT1021
bool "SOC_MIMXRT1021" bool "SOC_MIMXRT1021"
select HAS_MCUX select HAS_MCUX
select HAS_MCUX_CACHE
select HAS_MCUX_CCM select HAS_MCUX_CCM
select HAS_MCUX_ENET select HAS_MCUX_ENET
select HAS_MCUX_IGPIO select HAS_MCUX_IGPIO
@ -28,6 +29,7 @@ config SOC_MIMXRT1021
config SOC_MIMXRT1051 config SOC_MIMXRT1051
bool "SOC_MIMXRT1051" bool "SOC_MIMXRT1051"
select HAS_MCUX select HAS_MCUX
select HAS_MCUX_CACHE
select HAS_MCUX_CCM select HAS_MCUX_CCM
select HAS_MCUX_ENET select HAS_MCUX_ENET
select HAS_MCUX_IGPIO select HAS_MCUX_IGPIO
@ -44,6 +46,7 @@ config SOC_MIMXRT1051
config SOC_MIMXRT1052 config SOC_MIMXRT1052
bool "SOC_MIMXRT1052" bool "SOC_MIMXRT1052"
select HAS_MCUX select HAS_MCUX
select HAS_MCUX_CACHE
select HAS_MCUX_CCM select HAS_MCUX_CCM
select HAS_MCUX_ENET select HAS_MCUX_ENET
select HAS_MCUX_IGPIO select HAS_MCUX_IGPIO
@ -60,6 +63,7 @@ config SOC_MIMXRT1052
config SOC_MIMXRT1061 config SOC_MIMXRT1061
bool "SOC_MIMXRT1061" bool "SOC_MIMXRT1061"
select HAS_MCUX select HAS_MCUX
select HAS_MCUX_CACHE
select HAS_MCUX_CCM select HAS_MCUX_CCM
select HAS_MCUX_ENET select HAS_MCUX_ENET
select HAS_MCUX_IGPIO select HAS_MCUX_IGPIO
@ -75,6 +79,7 @@ config SOC_MIMXRT1061
config SOC_MIMXRT1062 config SOC_MIMXRT1062
bool "SOC_MIMXRT1062" bool "SOC_MIMXRT1062"
select HAS_MCUX select HAS_MCUX
select HAS_MCUX_CACHE
select HAS_MCUX_CCM select HAS_MCUX_CCM
select HAS_MCUX_ENET select HAS_MCUX_ENET
select HAS_MCUX_IGPIO select HAS_MCUX_IGPIO