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drivers/i2c: Rename generic configure option in DW drivers

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And adapt SoC's information relevantly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2018-02-28 14:00:54 +01:00 • committed by Kumar Gala
commit 6d247b5c2b
5 changed files with 37 additions and 37 deletions
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15
arch/arc/soc/em11d/soc.h
View file

@ -47,12 +47,13 @@
/* I2C */
/* I2C_0 is on Pmod2 connector */
#define I2C_DW_0_BASE_ADDR 0xF0004000
#define CONFIG_I2C_0_BASE_ADDR 0xF0004000
#define CONFIG_I2C_0_IRQ_FLAGS 0
/* I2C_1 is on Pmod4 connector */
#define I2C_DW_1_BASE_ADDR 0xF0005000
#define CONFIG_I2C_1_BASE_ADDR 0xF0005000
#define CONFIG_I2C_1_IRQ_FLAGS 0
#define I2C_DW_IRQ_FLAGS 0
/* GPIO */
#define GPIO_DW_0_BASE_ADDR 0xF0002000 /* GPIO 0 : PORTA */
@ -110,8 +111,8 @@
*/
#ifdef CONFIG_BOARD_EM_STARTERKIT_R23
#define GPIO_DW_0_IRQ 24
#define I2C_DW_0_IRQ 25
#define I2C_DW_1_IRQ 26
#define CONFIG_I2C_0_IRQ 25
#define CONFIG_I2C_1_IRQ 26
#define SPI_DW_PORT_0_IRQ 27
#define SPI_DW_PORT_1_IRQ 28
#define UART_NS16550_PORT_0_IRQ 29
@ -119,8 +120,8 @@
#define UART_NS16550_PORT_2_IRQ 31
#else /* CONFIG_BOARD_EM_STARTERKIT_R23 */
#define GPIO_DW_0_IRQ 22
#define I2C_DW_0_IRQ 23
#define I2C_DW_1_IRQ 24
#define CONFIG_I2C_0_IRQ 23
#define CONFIG_I2C_1_IRQ 24
#define SPI_DW_PORT_0_IRQ 25
#define SPI_DW_PORT_1_IRQ 26
#define UART_NS16550_PORT_0_IRQ 27

17
arch/arc/soc/em7d/soc.h
View file

@ -55,13 +55,12 @@
#define INT_ENABLE_ARC_BIT_POS (8)
/* I2C */
/* I2C_0 is on Pmod2 connector */
#define I2C_DW_0_BASE_ADDR 0xF0004000
#define CONFIG_I2C_0_BASE_ADDR 0xF0004000
#define CONFIG_I2C_0_IRQ_FLAGS 0
/* I2C_1 is on Pmod4 connector */
#define I2C_DW_1_BASE_ADDR 0xF0005000
#define I2C_DW_IRQ_FLAGS 0
#define CONFIG_I2C_1_BASE_ADDR 0xF0005000
#define CONFIG_I2C_1_IRQ_FLAGS 0
/* GPIO */
#define GPIO_DW_0_BASE_ADDR 0xF0002000 /* GPIO 0 : PORTA */
@ -119,8 +118,8 @@
*/
#ifdef CONFIG_BOARD_EM_STARTERKIT_R23
#define GPIO_DW_0_IRQ 24
#define I2C_DW_0_IRQ 25
#define I2C_DW_1_IRQ 26
#define CONFIG_I2C_0_IRQ 25
#define CONFIG_I2C_1_IRQ 26
#define SPI_DW_PORT_0_IRQ 27
#define SPI_DW_PORT_1_IRQ 28
#define UART_NS16550_PORT_0_IRQ 29
@ -128,8 +127,8 @@
#define UART_NS16550_PORT_2_IRQ 31
#else /* CONFIG_BOARD_EM_STARTERKIT_R23 */
#define GPIO_DW_0_IRQ 22
#define I2C_DW_0_IRQ 23
#define I2C_DW_1_IRQ 24
#define CONFIG_I2C_0_IRQ 23
#define CONFIG_I2C_1_IRQ 24
#define SPI_DW_PORT_0_IRQ 25
#define SPI_DW_PORT_1_IRQ 26
#define UART_NS16550_PORT_0_IRQ 27

16
arch/arc/soc/em9d/soc.h
View file

@ -47,12 +47,12 @@
/* I2C */
/* I2C_0 is on Pmod2 connector */
#define I2C_DW_0_BASE_ADDR 0xF0004000
#define CONFIG_I2C_0_BASE_ADDR 0xF0004000
#define CONFIG_I2C_0_IRQ_FLAGS 0
/* I2C_1 is on Pmod4 connector */
#define I2C_DW_1_BASE_ADDR 0xF0005000
#define I2C_DW_IRQ_FLAGS 0
#define CONFIG_I2C_1_BASE_ADDR 0xF0005000
#define CONFIG_I2C_1_IRQ_FLAGS 0
/* GPIO */
#define GPIO_DW_0_BASE_ADDR 0xF0002000 /* GPIO 0 : PORTA */
@ -110,8 +110,8 @@
*/
#ifdef CONFIG_BOARD_EM_STARTERKIT_R23
#define GPIO_DW_0_IRQ 24
#define I2C_DW_0_IRQ 25
#define I2C_DW_1_IRQ 26
#define CONFIG_I2C_0_IRQ 25
#define CONFIG_I2C_1_IRQ 26
#define SPI_DW_PORT_0_IRQ 27
#define SPI_DW_PORT_1_IRQ 28
#define UART_NS16550_PORT_0_IRQ 29
@ -119,8 +119,8 @@
#define UART_NS16550_PORT_2_IRQ 31
#else /* CONFIG_BOARD_EM_STARTERKIT_R23 */
#define GPIO_DW_0_IRQ 22
#define I2C_DW_0_IRQ 23
#define I2C_DW_1_IRQ 24
#define CONFIG_I2C_0_IRQ 23
#define CONFIG_I2C_1_IRQ 24
#define SPI_DW_PORT_0_IRQ 25
#define SPI_DW_PORT_1_IRQ 26
#define UART_NS16550_PORT_0_IRQ 27

6
arch/x86/soc/intel_quark/quark_x1000/soc.h
View file

@ -97,8 +97,8 @@
#define I2C_DW_PCI_DEVICE_ID 0x0934
#define I2C_DW_PCI_CLASS 0x0C
#define I2C_DW_0_BASE_ADDR 0x90007000
#define I2C_DW_0_IRQ 18
#define CONFIG_I2C_0_BASE_ADDR 0x90007000
#define CONFIG_I2C_0_IRQ 18
#define I2C_DW_0_PCI_BUS 0
#define I2C_DW_0_PCI_DEV 21
@ -106,7 +106,7 @@
#define I2C_DW_0_PCI_BAR 0
#if defined(CONFIG_IOAPIC)
#define I2C_DW_IRQ_FLAGS (IOAPIC_LEVEL | IOAPIC_LOW)
#define CONFIG_I2C_0_IRQ_FLAGS (IOAPIC_LEVEL | IOAPIC_LOW)
#endif
/*

20
drivers/i2c/i2c_dw.c
View file

@ -700,7 +700,7 @@ static void i2c_config_0(struct device *port);
static const struct i2c_dw_rom_config i2c_config_dw_0 = {
#ifdef CONFIG_I2C_DW_0_IRQ_DIRECT
.irq_num = I2C_DW_0_IRQ,
.irq_num = CONFIG_I2C_0_IRQ,
#endif
.config_func = i2c_config_0,
@ -710,7 +710,7 @@ static const struct i2c_dw_rom_config i2c_config_dw_0 = {
};
static struct i2c_dw_dev_config i2c_0_runtime = {
.base_address = I2C_DW_0_BASE_ADDR,
.base_address = CONFIG_I2C_0_BASE_ADDR,
.app_config = CONFIG_I2C_0_DEFAULT_CFG,
#if CONFIG_PCI
.pci_dev.class_type = I2C_DW_PCI_CLASS,
@ -731,9 +731,9 @@ DEVICE_AND_API_INIT(i2c_0, CONFIG_I2C_0_NAME, &i2c_dw_initialize,
static void i2c_config_0(struct device *port)
{
#if defined(CONFIG_I2C_DW_0_IRQ_DIRECT)
IRQ_CONNECT(I2C_DW_0_IRQ, CONFIG_I2C_0_IRQ_PRI,
i2c_dw_isr, DEVICE_GET(i2c_0), I2C_DW_IRQ_FLAGS);
irq_enable(I2C_DW_0_IRQ);
IRQ_CONNECT(CONFIG_I2C_0_IRQ, CONFIG_I2C_0_IRQ_PRI,
i2c_dw_isr, DEVICE_GET(i2c_0), CONFIG_I2C_0_IRQ_FLAGS);
irq_enable(CONFIG_I2C_0_IRQ);
#elif defined(CONFIG_I2C_DW_0_IRQ_SHARED)
const struct i2c_dw_rom_config * const config =
port->config->config_info;
@ -754,12 +754,12 @@ static void i2c_config_0(struct device *port)
static void i2c_config_1(struct device *port);
static const struct i2c_dw_rom_config i2c_config_dw_1 = {
.irq_num = I2C_DW_1_IRQ,
.irq_num = CONFIG_I2C_1_IRQ,
.config_func = i2c_config_1,
};
static struct i2c_dw_dev_config i2c_1_runtime = {
.base_address = I2C_DW_1_BASE_ADDR,
.base_address = CONFIG_I2C_1_BASE_ADDR,
.app_config = CONFIG_I2C_1_DEFAULT_CFG,
#if CONFIG_PCI
@ -780,9 +780,9 @@ DEVICE_AND_API_INIT(i2c_1, CONFIG_I2C_1_NAME, &i2c_dw_initialize,
static void i2c_config_1(struct device *port)
{
IRQ_CONNECT(I2C_DW_1_IRQ, CONFIG_I2C_1_IRQ_PRI,
i2c_dw_isr, DEVICE_GET(i2c_1), I2C_DW_IRQ_FLAGS);
irq_enable(I2C_DW_1_IRQ);
IRQ_CONNECT(CONFIG_I2C_1_IRQ, CONFIG_I2C_1_IRQ_PRI,
i2c_dw_isr, DEVICE_GET(i2c_1), CONFIG_I2C_1_IRQ_FLAGS);
irq_enable(CONFIG_I2C_1_IRQ);
}
#endif /* CONFIG_I2C_1 */