diff --git a/drivers/adc/adc_mcux_12b1msps_sar.c b/drivers/adc/adc_mcux_12b1msps_sar.c index 558c767e84c..b1b84004d17 100644 --- a/drivers/adc/adc_mcux_12b1msps_sar.c +++ b/drivers/adc/adc_mcux_12b1msps_sar.c @@ -12,6 +12,7 @@ #include #include +#include #define LOG_LEVEL CONFIG_ADC_LOG_LEVEL #include @@ -27,6 +28,7 @@ struct mcux_12b1msps_sar_adc_config { adc_reference_voltage_source_t ref_src; adc_sample_period_mode_t sample_period_mode; void (*irq_config_func)(const struct device *dev); + const struct pinctrl_dev_config *pincfg; }; struct mcux_12b1msps_sar_adc_data { @@ -217,6 +219,12 @@ static int mcux_12b1msps_sar_adc_init(const struct device *dev) struct mcux_12b1msps_sar_adc_data *data = dev->data; ADC_Type *base = config->base; adc_config_t adc_config; + int err; + + err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); + if (err) { + return err; + } ADC_GetDefaultConfig(&adc_config); @@ -275,6 +283,7 @@ static const struct adc_driver_api mcux_12b1msps_sar_adc_driver_api = { "Invalid clock divider"); \ ASSERT_WITHIN_RANGE(DT_INST_PROP(n, sample_period_mode), 0, 3, \ "Invalid sample period mode"); \ + PINCTRL_DT_INST_DEFINE(n); \ \ static const struct mcux_12b1msps_sar_adc_config mcux_12b1msps_sar_adc_config_##n = { \ .base = (ADC_Type *)DT_INST_REG_ADDR(n), \ @@ -283,7 +292,8 @@ static const struct adc_driver_api mcux_12b1msps_sar_adc_driver_api = { TO_RT_ADC_CLOCK_DIV(DT_INST_PROP(n, clk_divider)), \ .ref_src = kADC_ReferenceVoltageSourceAlt0, \ .sample_period_mode = DT_INST_PROP(n, sample_period_mode), \ - .irq_config_func = mcux_12b1msps_sar_adc_config_func_##n, \ + .irq_config_func = mcux_12b1msps_sar_adc_config_func_##n, \ + .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ }; \ \ static struct mcux_12b1msps_sar_adc_data mcux_12b1msps_sar_adc_data_##n = { \ diff --git a/dts/bindings/adc/nxp,mcux-12b1msps-sar.yaml b/dts/bindings/adc/nxp,mcux-12b1msps-sar.yaml index 3f9a36c5e89..1def241971a 100644 --- a/dts/bindings/adc/nxp,mcux-12b1msps-sar.yaml +++ b/dts/bindings/adc/nxp,mcux-12b1msps-sar.yaml @@ -5,7 +5,7 @@ description: NXP MCUA 12B1MSPS SAR ADC compatible: "nxp,mcux-12b1msps-sar" -include: adc-controller.yaml +include: [adc-controller.yaml, pinctrl-device.yaml] properties: reg: