From 6bd7f781a33caad625f358514c56339b7fc3c96e Mon Sep 17 00:00:00 2001 From: Jay Vasanth Date: Tue, 17 Jan 2023 17:31:33 -0500 Subject: [PATCH] mec150x: clk ctrl: fix clock trim register update Program the right trim control register for mec150x. This fixes uart debug console output issue. Signed-off-by: Jay Vasanth --- drivers/clock_control/clock_control_mchp_xec.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/clock_control/clock_control_mchp_xec.c b/drivers/clock_control/clock_control_mchp_xec.c index 5ea29d88004..9444e2c2790 100644 --- a/drivers/clock_control/clock_control_mchp_xec.c +++ b/drivers/clock_control/clock_control_mchp_xec.c @@ -131,6 +131,8 @@ struct vbatr_hw_regs { volatile uint32_t CLK32_SRC; uint32_t RSVD2[2]; volatile uint32_t CLK32_TRIM; + uint32_t RSVD3[1]; + volatile uint32_t CLK32_TRIM_CTRL; }; /* MEC152x VBAT CLK32_SRC register defines */ @@ -279,7 +281,7 @@ static int soc_clk32_init(const struct device *dev, if (MCHP_DEVICE_ID() == XEC_CC15_GCFG_DID_DEV_ID_MEC150x) { if (MCHP_REVISION_ID() == MCHP_GCFG_REV_B0) { - vbr->CLK32_TRIM = XEC_CC15_TRIM_ENABLE_INT_OSCILLATOR; + vbr->CLK32_TRIM_CTRL = XEC_CC15_TRIM_ENABLE_INT_OSCILLATOR; } }