dts: Add and extend Nordic bindings needed for nRF54H20

Add a set of bindings that will be used in the nRF54H20 SoC definition.
Extend the existing GPIOTE binding with properties needed for this SoC.
Also do a tiny clean-up in the bindings added recently for nRF54L15
(HFXO and LFXO).

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>

dts/bindings/riscv/nordic,nrf-vpr-coprocessor.yaml

@@ -0,0 +1,29 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+compatible: "nordic,nrf-vpr-coprocessor"
+
+description: |
+  VPR coprocessor
+
+  VPR is a RISC-V CPU implementation. VPR instances are exposed to other CPUs as
+  peripherals.
+
+include: base.yaml
+
+properties:
+  cpu:
+    type: int
+    description: |
+      Processor ID of the VPR core.
+
+  execution-memory:
+    type: phandle
+    required: true
+    description: |
+      Memory area from which the VPR core will execute.
+
+  source-memory:
+    type: phandle
+    description: |
+      Memory area or partition from which the VPR code will be loaded.