From 6bcb9c6a98da410f8e06d31b96d524687e44601e Mon Sep 17 00:00:00 2001 From: Rajavardhan Gundi Date: Fri, 12 Oct 2018 10:15:58 +0530 Subject: [PATCH] xtensa: intel_s1000: Move some functions to SoC level SYS_INIT Mux configuration for I2C and GPIO are now done in SYS_INIT which were earlier done in the respective tests. Signed-off-by: Rajavardhan Gundi --- soc/xtensa/intel_s1000/soc.c | 27 ++++++++++++++ soc/xtensa/intel_s1000/soc.h | 11 ++++++ tests/boards/intel_s1000_crb/src/main.c | 47 ------------------------- 3 files changed, 38 insertions(+), 47 deletions(-) diff --git a/soc/xtensa/intel_s1000/soc.c b/soc/xtensa/intel_s1000/soc.c index cebfa58d74c..9d6fbcb221d 100644 --- a/soc/xtensa/intel_s1000/soc.c +++ b/soc/xtensa/intel_s1000/soc.c @@ -146,6 +146,24 @@ void _soc_irq_disable(u32_t irq) } } +void soc_config_iomux_ctsrts(void) +{ + volatile struct soc_io_mux_regs *regs = + (volatile struct soc_io_mux_regs *)IOMUX_BASE; + + /* Configure the MUX to select GPIO functionality for GPIO 23 and 24 */ + regs->io_mux_ctl0 |= SOC_UART_RTS_CTS_MS; +} + +void soc_config_iomux_i2c(void) +{ + volatile struct soc_io_mux_regs *regs = + (volatile struct soc_io_mux_regs *)IOMUX_BASE; + + /* Configure the MUX to select the correct I2C port (I2C1) */ + regs->io_mux_ctl2 |= SOC_I2C_I0_I1_MS; +} + static inline void soc_set_resource_ownership(void) { volatile struct soc_resource_alloc_regs *regs = @@ -225,6 +243,15 @@ static int soc_init(struct device *dev) soc_set_resource_ownership(); soc_set_power_and_clock(); + +#ifdef CONFIG_I2C + soc_config_iomux_i2c(); +#endif + +#ifdef CONFIG_GPIO + soc_config_iomux_ctsrts(); +#endif + return 0; } diff --git a/soc/xtensa/intel_s1000/soc.h b/soc/xtensa/intel_s1000/soc.h index 901446a2ae1..07bcc3111b9 100644 --- a/soc/xtensa/intel_s1000/soc.h +++ b/soc/xtensa/intel_s1000/soc.h @@ -87,6 +87,17 @@ #define SOC_NUM_LPGPDMAC 3 #define SOC_NUM_CHANNELS_IN_DMAC 8 +#define IOMUX_BASE 0x00081C00 +#define SOC_I2C_I0_I1_MS BIT(0) +#define SOC_UART_RTS_CTS_MS BIT(16) + +struct soc_io_mux_regs { + u32_t reserved[12]; + u32_t io_mux_ctl0; + u32_t io_mux_ctl1; + u32_t io_mux_ctl2; +}; + /* SOC Resource Allocation Registers */ #define SOC_RESOURCE_ALLOC_REG_BASE 0x00071A60 /* bit field definition for LP GPDMA ownership register */ diff --git a/tests/boards/intel_s1000_crb/src/main.c b/tests/boards/intel_s1000_crb/src/main.c index f0687584464..a682a872217 100644 --- a/tests/boards/intel_s1000_crb/src/main.c +++ b/tests/boards/intel_s1000_crb/src/main.c @@ -10,60 +10,13 @@ #include LOG_MODULE_REGISTER(main); -#define IOMUX_BASE 0x00081C00 -#define IOMUX_CONTROL0 (IOMUX_BASE + 0x30) -#define IOMUX_CONTROL2 (IOMUX_BASE + 0x38) -#define TS_POWER_CONFIG 0x00071F90 - /* This semaphore is used to serialize the UART prints dumped by various * modules. This prevents mixing of UART prints across modules. This * semaphore starts off "available". */ K_SEM_DEFINE(thread_sem, 1, 1); -/* Disable Tensilica power gating */ -void disable_ts_powergate(void) -{ - volatile u16_t pwrcfg = *(volatile u16_t *)TS_POWER_CONFIG; - - /* Set the below bits to disable power gating: - * BIT0 - Tensilica Core Prevent DSP Core Power Gating - * BIT4 - Tensilica Core Prevent Controller Power Gating - * BIT5 - Ignore D3 / D0i3 Power Gating - * BIT6 - Tensilica Core Prevent DSP Common Power Gating - */ - pwrcfg |= BIT(0) | BIT(4) | BIT(5) | BIT(6); - - *(volatile u16_t *)TS_POWER_CONFIG = pwrcfg; -} - -/* Configure the MUX to select GPIO functionality for GPIO 23 and 24 */ -void iomux_config_ctsrts(void) -{ - volatile u32_t iomux_cntrl0 = *(volatile u32_t *)IOMUX_CONTROL0; - - /* Set bit 16 to convert the pins to normal GPIOs from UART_RTS_CTS */ - iomux_cntrl0 |= BIT(16); - - *(volatile u32_t *)IOMUX_CONTROL0 = iomux_cntrl0; -} - -/* Configure the MUX to select the correct I2C port (I2C1) */ -void iomux_config_i2c(void) -{ - volatile u32_t iomux_cntrl2 = *(volatile u32_t *)IOMUX_CONTROL2; - - /* Set bit 0 to select i2c1 */ - iomux_cntrl2 |= BIT(0); - - *(volatile u32_t *)IOMUX_CONTROL2 = iomux_cntrl2; -} - void main(void) { printk("Sample app running on: %s Intel S1000 CRB\n", CONFIG_ARCH); - - disable_ts_powergate(); - iomux_config_i2c(); - iomux_config_ctsrts(); }