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soc: mimxrt595s/cm33, mimxrt685s/cm33: Add clock config for audio

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Add clock config for Flexcomm peripherals functioning as I2S interfaces.
Add MCLK clock config for the WM8904 codec located on the mimxrt595_evk
and mimxrt685_evk boards.

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
This commit is contained in:
Hake Huang 2023-12-16 13:39:16 +08:00 • committed by Carles Cufí
commit 6b796314fe
2 changed files with 19 additions and 0 deletions
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12
soc/nxp/imxrt/imxrt5xx/cm33/soc.c
View file

@ -284,6 +284,11 @@ void __weak rt5xx_clock_init(void)
usb_device_clock_init(); usb_device_clock_init();
#endif #endif
#if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_i2s, okay) && CONFIG_I2S)
/* attach AUDIO PLL clock to FLEXCOMM1 (I2S_PDM) */
CLOCK_AttachClk(kAUDIO_PLL_to_FLEXCOMM0);
#endif
#if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm1), nxp_lpc_i2s, okay) && CONFIG_I2S) #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm1), nxp_lpc_i2s, okay) && CONFIG_I2S)
/* attach AUDIO PLL clock to FLEXCOMM1 (I2S1) */ /* attach AUDIO PLL clock to FLEXCOMM1 (I2S1) */
CLOCK_AttachClk(kAUDIO_PLL_to_FLEXCOMM1); CLOCK_AttachClk(kAUDIO_PLL_to_FLEXCOMM1);
@ -433,6 +438,13 @@ void __weak rt5xx_clock_init(void)
/* Set main clock to FRO as deep sleep clock by default. */ /* Set main clock to FRO as deep sleep clock by default. */
POWER_SetDeepSleepClock(kDeepSleepClk_Fro); POWER_SetDeepSleepClock(kDeepSleepClk_Fro);
#if CONFIG_AUDIO_CODEC_WM8904
/* attach AUDIO PLL clock to MCLK */
CLOCK_AttachClk(kAUDIO_PLL_to_MCLK_CLK);
CLOCK_SetClkDiv(kCLOCK_DivMclkClk, 1);
SYSCTL1->MCLKPINDIR = SYSCTL1_MCLKPINDIR_MCLKPINDIR_MASK;
#endif
} }
#if CONFIG_MIPI_DSI #if CONFIG_MIPI_DSI

7
soc/nxp/imxrt/imxrt6xx/cm33/soc.c
View file

@ -270,6 +270,13 @@ static ALWAYS_INLINE void clock_init(void)
CLOCK_AttachClk(kAUDIO_PLL_to_FLEXCOMM3); CLOCK_AttachClk(kAUDIO_PLL_to_FLEXCOMM3);
#endif #endif
#if CONFIG_AUDIO_CODEC_WM8904
/* attach AUDIO PLL clock to MCLK */
CLOCK_AttachClk(kAUDIO_PLL_to_MCLK_CLK);
CLOCK_SetClkDiv(kCLOCK_DivMclkClk, 1);
SYSCTL1->MCLKPINDIR = SYSCTL1_MCLKPINDIR_MCLKPINDIR_MASK;
#endif
#if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(wwdt0), nxp_lpc_wwdt, okay)) #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(wwdt0), nxp_lpc_wwdt, okay))
CLOCK_AttachClk(kLPOSC_to_WDT0_CLK); CLOCK_AttachClk(kLPOSC_to_WDT0_CLK);
#else #else