soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with all related boards. Most braking changes includes: - changing the CONFIG_SOC_ESP32* to refer to the actual soc line (esp32,esp32s2,esp32s3,esp32c3) - replacing CONFIG_SOC with the CONFIG_SOC_SERIES - creating CONFIG_SOC_FAMILY_ESP32 to embrace all the ESP32 across all used architectures - introducing CONFIG_SOC_PART_NUMBER_* to provide a SOC model config - introducing the 'common' folder to hide all commonly used configs and files. - updating west.yml to reflect previous changes in hal Signed-off-by: Marek Matej <marek.matej@espressif.com>
This commit is contained in:
Marek Matej
Carles Cufí
parent
7472ff97d0
commit
6b57b3b786
154 changed files with 1049 additions and 1646 deletions
296
soc/xtensa/espressif_esp32/esp32s3/Kconfig.soc
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296
soc/xtensa/espressif_esp32/esp32s3/Kconfig.soc
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# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
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# SPDX-License-Identifier: Apache-2.0
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if SOC_SERIES_ESP32S3
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config IDF_TARGET_ESP32S3
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bool "ESP32S3 as target SOC"
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default y
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config SOC_TOOLCHAIN_NAME
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string
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default "espressif_esp32s3"
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choice SOC_PART_NUMBER
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prompt "ESP32-S3 SOC Selection"
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depends on SOC_SERIES_ESP32S3
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# SoC with/without embedded flash
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config SOC_ESP32S3
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bool "ESP32S3"
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config SOC_ESP32S3_R2
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bool "ESP32S3_R2"
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config SOC_ESP32S3_R8
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bool "ESP32S3_R8"
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config SOC_ESP32S3_R8V
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bool "ESP32S3_R8V"
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config SOC_ESP32S3_FN8
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bool "ESP32S3_FN8"
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config SOC_ESP32S3_PICO_N8R2
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bool "ESP32S3_PICO_N8R2"
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config SOC_ESP32S3_PICO_N8R8
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bool "ESP32S3_PICO_N8R8"
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# SiP with flash and/or psram
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config SOC_ESP32S3_MINI_N8
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bool "ESP32S3_MINI_N8"
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config SOC_ESP32S3_MINI_N4R2
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bool "ESP32S3_MINI_N4R2"
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config SOC_ESP32S3_WROOM_N4
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bool "ESP32S3_WROOM_N4"
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config SOC_ESP32S3_WROOM_N8
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bool "ESP32S3_WROOM_N8"
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config SOC_ESP32S3_WROOM_N16
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bool "ESP32S3_WROOM_N16"
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config SOC_ESP32S3_WROOM_N4R8
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bool "ESP32S3_WROOM_N4R8"
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config SOC_ESP32S3_WROOM_N8R8
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bool "ESP32S3_WROOM_N8R8"
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config SOC_ESP32S3_WROOM_N16R8
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bool "ESP32S3_WROOM_N16"
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endchoice # SOC_PART_NUMBER
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choice ESP32S3_RTC_CLK_SRC
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prompt "RTC clock source"
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default ESP32S3_RTC_CLK_SRC_INT_RC
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help
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Choose which clock is used as RTC clock source.
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config ESP32S3_RTC_CLK_SRC_INT_RC
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bool "Internal 150kHz RC oscillator"
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config ESP32S3_RTC_CLK_SRC_EXT_CRYS
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bool "External 32kHz crystal"
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select ESP_SYSTEM_RTC_EXT_XTAL
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config ESP32S3_RTC_CLK_SRC_EXT_OSC
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bool "External 32kHz oscillator at 32K_XP pin"
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select ESP_SYSTEM_RTC_EXT_OSC
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config ESP32S3_RTC_CLK_SRC_INT_8MD256
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bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
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endchoice
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config ESP32S3_RTC_CLK_CAL_CYCLES
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int "Number of cycles for RTC_SLOW_CLK calibration"
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default 3000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256
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default 1024 if ESP32S3_RTC_CLK_SRC_INT_RC
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range 0 27000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256
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range 0 32766 if ESP32S3_RTC_CLK_SRC_INT_RC
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help
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When the startup code initializes RTC_SLOW_CLK, it can perform
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calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
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frequency. This option sets the number of RTC_SLOW_CLK cycles measured
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by the calibration routine. Higher numbers increase calibration
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precision, which may be important for applications which spend a lot of
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time in deep sleep. Lower numbers reduce startup time.
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When this option is set to 0, clock calibration will not be performed at
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startup, and approximate clock frequencies will be assumed:
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- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
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In case more value will help improve the definition of the launch of the crystal.
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If the crystal could not start, it will be switched to internal RC.
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choice ESP32_UNIVERSAL_MAC_ADDRESSES
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bool "Number of universally administered (by IEEE) MAC address"
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default ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
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help
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Configure the number of universally administered (by IEEE) MAC addresses.
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During initialization, MAC addresses for each network interface are generated or
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derived from a single base MAC address. If the number of universal MAC addresses is four,
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all four interfaces (WiFi station, WiFi softap, Bluetooth and Ethernet) receive a universally
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administered MAC address. These are generated sequentially by adding 0, 1, 2 and 3 (respectively)
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to the final octet of the base MAC address. If the number of universal MAC addresses is two,
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only two interfaces (WiFi station and Bluetooth) receive a universally administered MAC address.
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These are generated sequentially by adding 0 and 1 (respectively) to the base MAC address.
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The remaining two interfaces (WiFi softap and Ethernet) receive local MAC addresses.
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These are derived from the universal WiFi station and Bluetooth MAC addresses, respectively.
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When using the default (Espressif-assigned) base MAC address, either setting can be used.
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When using a custom universal MAC address range, the correct setting will depend on the
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allocation of MAC addresses in this range (either 2 or 4 per device.)
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config ESP32_UNIVERSAL_MAC_ADDRESSES_TWO
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bool "Two"
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select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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select ESP_MAC_ADDR_UNIVERSE_BT
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config ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
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bool "Four"
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select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
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select ESP_MAC_ADDR_UNIVERSE_BT
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select ESP_MAC_ADDR_UNIVERSE_ETH
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endchoice # ESP32_UNIVERSAL_MAC_ADDRESSES
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config ESP_MAC_ADDR_UNIVERSE_WIFI_AP
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bool
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config ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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bool
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config ESP_MAC_ADDR_UNIVERSE_BT
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bool
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config ESP_MAC_ADDR_UNIVERSE_ETH
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bool
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config ESP32_UNIVERSAL_MAC_ADDRESSES
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int
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default 2 if ESP32_UNIVERSAL_MAC_ADDRESSES_TWO
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default 4 if ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
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config ESP32_PHY_MAX_WIFI_TX_POWER
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int "Max WiFi/BLE TX power (dBm)"
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range 10 20
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default 20
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help
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Set maximum transmit power for WiFi radio. Actual transmit power for high
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data rates may be lower than this setting.
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config ESP32_PHY_MAX_TX_POWER
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int
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default ESP32_PHY_MAX_WIFI_TX_POWER
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menu "Cache config"
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choice ESP32S3_INSTRUCTION_CACHE_SIZE
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prompt "Instruction cache size"
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default ESP32S3_INSTRUCTION_CACHE_16KB
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help
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Instruction cache size to be set on application startup.
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If you use 16KB instruction cache rather than 32KB instruction cache,
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then the other 16KB will be managed by heap allocator.
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config ESP32S3_INSTRUCTION_CACHE_16KB
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bool "16KB"
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config ESP32S3_INSTRUCTION_CACHE_32KB
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bool "32KB"
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endchoice
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config ESP32S3_INSTRUCTION_CACHE_SIZE
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hex
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default 0x4000 if ESP32S3_INSTRUCTION_CACHE_16KB
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default 0x8000 if ESP32S3_INSTRUCTION_CACHE_32KB
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choice ESP32S3_ICACHE_ASSOCIATED_WAYS
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prompt "Instruction cache associated ways"
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default ESP32S3_INSTRUCTION_CACHE_8WAYS
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help
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Instruction cache associated ways to be set on application startup.
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config ESP32S3_INSTRUCTION_CACHE_4WAYS
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bool "4 ways"
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config ESP32S3_INSTRUCTION_CACHE_8WAYS
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bool "8 ways"
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endchoice
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config ESP32S3_ICACHE_ASSOCIATED_WAYS
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int
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default 4 if ESP32S3_INSTRUCTION_CACHE_4WAYS
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default 8 if ESP32S3_INSTRUCTION_CACHE_8WAYS
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choice ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
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prompt "Instruction cache line size"
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default ESP32S3_INSTRUCTION_CACHE_LINE_32B
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help
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Instruction cache line size to be set on application startup.
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config ESP32S3_INSTRUCTION_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S3_INSTRUCTION_CACHE_16KB
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config ESP32S3_INSTRUCTION_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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config ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
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int
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default 16 if ESP32S3_INSTRUCTION_CACHE_LINE_16B
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default 32 if ESP32S3_INSTRUCTION_CACHE_LINE_32B
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config ESP32S3_INSTRUCTION_CACHE_WRAP
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bool "Define instruction cache wrap mode"
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help
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If enabled, instruction cache will use wrap mode to read spi flash or spi ram.
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The wrap length equals to ESP32S3_INSTRUCTION_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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choice ESP32S3_DATA_CACHE_SIZE
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prompt "Data cache size"
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default ESP32S3_DATA_CACHE_32KB
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help
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Data cache size to be set on application startup.
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If you use 32KB data cache rather than 64KB data cache,
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the other 32KB will be added to the heap.
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config ESP32S3_DATA_CACHE_16KB
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bool "16KB"
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config ESP32S3_DATA_CACHE_32KB
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bool "32KB"
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config ESP32S3_DATA_CACHE_64KB
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bool "64KB"
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endchoice
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config ESP32S3_DATA_CACHE_SIZE
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hex
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# For 16KB the actual configuration is 32kb cache, but 16kb will be reserved for heap at startup
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default 0x8000 if ESP32S3_DATA_CACHE_16KB
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default 0x8000 if ESP32S3_DATA_CACHE_32KB
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default 0x10000 if ESP32S3_DATA_CACHE_64KB
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choice ESP32S3_DCACHE_ASSOCIATED_WAYS
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prompt "Data cache associated ways"
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default ESP32S3_DATA_CACHE_8WAYS
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help
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Data cache associated ways to be set on application startup.
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config ESP32S3_DATA_CACHE_4WAYS
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bool "4 ways"
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config ESP32S3_DATA_CACHE_8WAYS
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bool "8 ways"
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endchoice
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config ESP32S3_DCACHE_ASSOCIATED_WAYS
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int
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default 4 if ESP32S3_DATA_CACHE_4WAYS
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default 8 if ESP32S3_DATA_CACHE_8WAYS
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choice ESP32S3_DATA_CACHE_LINE_SIZE
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prompt "Data cache line size"
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default ESP32S3_DATA_CACHE_LINE_32B
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help
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Data cache line size to be set on application startup.
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config ESP32S3_DATA_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S3_DATA_CACHE_16KB || ESP32S3_DATA_CACHE_32KB
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config ESP32S3_DATA_CACHE_LINE_32B
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bool "32 Bytes"
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config ESP32S3_DATA_CACHE_LINE_64B
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bool "64 Bytes"
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endchoice
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config ESP32S3_DATA_CACHE_LINE_SIZE
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int
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default 16 if ESP32S3_DATA_CACHE_LINE_16B
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default 32 if ESP32S3_DATA_CACHE_LINE_32B
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default 64 if ESP32S3_DATA_CACHE_LINE_64B
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config ESP32S3_DATA_CACHE_WRAP
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bool "Define data cache wrap mode"
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help
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If enabled, data cache will use wrap mode to read spi flash or spi ram.
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The wrap length equals to ESP32S3_DATA_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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config MAC_BB_PD
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bool "Power down MAC and baseband of Wi-Fi and Bluetooth when PHY is disabled"
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depends on SOC_SERIES_ESP32S3 && TICKLESS_KERNEL
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default n
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help
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If enabled, the MAC and baseband of Wi-Fi and Bluetooth will be powered
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down when PHY is disabled. Enabling this setting reduces power consumption
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by a small amount but increases RAM use by approximat
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endmenu # Cache config
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endif # SOC_SERIES_ESP32S3
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