From 6a7db6def9958fe3820eabbb9ef322d247d914a7 Mon Sep 17 00:00:00 2001
From: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Date: Thu, 22 Dec 2022 12:15:14 +0100
Subject: [PATCH] tests: drivers: uart: Align nrf52840dk configuration

Align configuration for nrf52840dk to use the same loopback pins
for uart_async_api and uart_mix_fifo_poll tests.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
---
 .../boards/nrf52840dk_nrf52840.overlay           |  8 ++++----
 .../boards/nrf52840dk_nrf52840.overlay           | 16 ++++++++--------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/tests/drivers/uart/uart_async_api/boards/nrf52840dk_nrf52840.overlay b/tests/drivers/uart/uart_async_api/boards/nrf52840dk_nrf52840.overlay
index ddcd6ce0776..86f2ea169cd 100644
--- a/tests/drivers/uart/uart_async_api/boards/nrf52840dk_nrf52840.overlay
+++ b/tests/drivers/uart/uart_async_api/boards/nrf52840dk_nrf52840.overlay
@@ -20,8 +20,8 @@
 		group1 {
 			psels = <NRF_PSEL(UART_TX, 1, 1)>,
 				<NRF_PSEL(UART_RX, 1, 2)>,
-				<NRF_PSEL(UART_RTS, 0, 5)>,
-				<NRF_PSEL(UART_CTS, 0, 7)>;
+				<NRF_PSEL(UART_RTS, 1, 3)>,
+				<NRF_PSEL(UART_CTS, 1, 4)>;
 		};
 	};
 
@@ -29,8 +29,8 @@
 		group1 {
 			psels = <NRF_PSEL(UART_TX, 1, 1)>,
 				<NRF_PSEL(UART_RX, 1, 2)>,
-				<NRF_PSEL(UART_RTS, 0, 5)>,
-				<NRF_PSEL(UART_CTS, 0, 7)>;
+				<NRF_PSEL(UART_RTS, 1, 3)>,
+				<NRF_PSEL(UART_CTS, 1, 4)>;
 			low-power-enable;
 		};
 	};
diff --git a/tests/drivers/uart/uart_mix_fifo_poll/boards/nrf52840dk_nrf52840.overlay b/tests/drivers/uart/uart_mix_fifo_poll/boards/nrf52840dk_nrf52840.overlay
index e1452f6afbd..773953fefa2 100644
--- a/tests/drivers/uart/uart_mix_fifo_poll/boards/nrf52840dk_nrf52840.overlay
+++ b/tests/drivers/uart/uart_mix_fifo_poll/boards/nrf52840dk_nrf52840.overlay
@@ -18,19 +18,19 @@
 
 	uart0_default_alt: uart0_default_alt {
 		group1 {
-			psels = <NRF_PSEL(UART_TX, 1, 12)>,
-				<NRF_PSEL(UART_RX, 1, 13)>,
-				<NRF_PSEL(UART_RTS, 1, 14)>,
-				<NRF_PSEL(UART_CTS, 1, 15)>;
+			psels = <NRF_PSEL(UART_TX, 1, 1)>,
+				<NRF_PSEL(UART_RX, 1, 2)>,
+				<NRF_PSEL(UART_RTS, 1, 3)>,
+				<NRF_PSEL(UART_CTS, 1, 4)>;
 		};
 	};
 
 	uart0_sleep_alt: uart0_sleep_alt {
 		group1 {
-			psels = <NRF_PSEL(UART_TX, 1, 12)>,
-				<NRF_PSEL(UART_RX, 1, 13)>,
-				<NRF_PSEL(UART_RTS, 1, 14)>,
-				<NRF_PSEL(UART_CTS, 1, 15)>;
+			psels = <NRF_PSEL(UART_TX, 1, 1)>,
+				<NRF_PSEL(UART_RX, 1, 2)>,
+				<NRF_PSEL(UART_RTS, 1, 3)>,
+				<NRF_PSEL(UART_CTS, 1, 4)>;
 			low-power-enable;
 		};
 	};