From 6a5520c626936689b6ddffebc7892be23ac1690b Mon Sep 17 00:00:00 2001 From: Nathan Krueger Date: Tue, 8 Mar 2022 17:01:17 -0800 Subject: [PATCH] arch/riscv: Adding KConfig options for 'A' and 'M' RISC-V extensions New KConfig options for 'A' and 'M' RISC-V extensions have been added. These are used to configure the '-march' string used by GCC to produce a compatible binary for the requested RISC-V variant. In order to maintain compatibility with all currently defined SoC, default the options for HW mul / Atomics support to 'y', but allow them to be overridden for any SoC which does not support these. I tested this change locally via twister agaisnt a few RISC-V platforms including some 32bit and 64bit. To verify the 4 possibilities of Atomics & HW Mul: (No, No), (No, Yes), (Yes, No), (Yes, Yes -- current behavior), I used an out-of-tree GCC (xPack RISC-V GCC) which has multilib support for rv32i, rv32ia, rv32ima to test against our out-of-tree Intel Nios V/m processor in HW. The Zephyr SDK RISCV GCC currently does not contain multilib support for all variants exposed by these new KConfig options. Signed-off-by: Nathan Krueger --- arch/riscv/Kconfig | 8 ++++++++ cmake/compiler/gcc/target_riscv.cmake | 11 +++++++++-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d6e374fcde3..296cf57d4ac 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -13,6 +13,14 @@ config COMPRESSED_ISA bool default y if 64BIT +config RISCV_ATOMICS_ISA + bool "RISC-V atomics 'a' extension" + default y + +config RISCV_MUL_ISA + bool "RISC-V HW multiply 'm' extension" + default y + config FLOAT_HARD bool "Hard-float calling convention" default y diff --git a/cmake/compiler/gcc/target_riscv.cmake b/cmake/compiler/gcc/target_riscv.cmake index ae61a9a7330..e2e03c7fdf1 100644 --- a/cmake/compiler/gcc/target_riscv.cmake +++ b/cmake/compiler/gcc/target_riscv.cmake @@ -5,12 +5,19 @@ set(riscv_march "rv") if(CONFIG_64BIT) string(CONCAT riscv_mabi ${riscv_mabi} "64") - string(CONCAT riscv_march ${riscv_march} "64ima") + string(CONCAT riscv_march ${riscv_march} "64i") list(APPEND TOOLCHAIN_C_FLAGS -mcmodel=medany) list(APPEND TOOLCHAIN_LD_FLAGS -mcmodel=medany) else() string(CONCAT riscv_mabi "i" ${riscv_mabi} "32") - string(CONCAT riscv_march ${riscv_march} "32ima") + string(CONCAT riscv_march ${riscv_march} "32i") +endif() + +if (CONFIG_RISCV_MUL_ISA) + string(CONCAT riscv_march ${riscv_march} "m") +endif() +if (CONFIG_RISCV_ATOMICS_ISA) + string(CONCAT riscv_march ${riscv_march} "a") endif() if(CONFIG_FPU)