boards: Added board file of Ophelia-I

Add board file of radio module Ophelia-I

Signed-off-by: Matthias Hauser <Matthias.Hauser@we-online.de>

boards/arm/we_ophelia1ev_nrf52805/Kconfig

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+# Ophelia-I EV nRF52805 board configuration
+
+# Copyright (c) 2020 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_ENABLE_DCDC
+	bool "DCDC mode"
+	select SOC_DCDC_NRF52X
+	default y
+	depends on BOARD_WE_OPHELIA1EV_NRF52805

boards/arm/we_ophelia1ev_nrf52805/Kconfig.board

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+# Copyright (c) 2022 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_WE_OPHELIA1EV_NRF52805
+	bool "we_ophelia1ev_nrf52805"
+	depends on SOC_NRF52805_CAAA

boards/arm/we_ophelia1ev_nrf52805/Kconfig.defconfig

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+# Copyright (c) 2022 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_WE_OPHELIA1EV_NRF52805
+
+config BOARD
+	default "we_ophelia1ev_nrf52805"
+
+config BT_CTLR
+	default BT
+
+endif

boards/arm/we_ophelia1ev_nrf52805/board.cmake

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+# Copyright (c) 2022 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=nRF52805_xxAA" "--speed=4000")
+board_runner_args(pyocd "--target=nrf52805" "--frequency=4000000")
+
+include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)

boards/arm/we_ophelia1ev_nrf52805/doc/index.rst

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+.. _we_ophelia1ev_nrf52805:
+
+Ophelia-I EV NRF52805
+#####################
+
+Overview
+********
+
+The we_ophelia1ev_nrf52805 board is an evaluation board of the Ophelia-I radio module.
+It provides support for the Nordic Semiconductor nRF52805 ARM CPU and
+the following devices:
+
+* CLOCK
+* FLASH
+* :abbr:`GPIO (General Purpose Input Output)`
+* :abbr:`I2C (Inter-Integrated Circuit)`
+* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
+* RADIO (Bluetooth Low Energy)
+* :abbr:`RTC (nRF RTC System Clock)`
+* Segger RTT (RTT Console)
+* :abbr:`SPI (Serial Peripheral Interface)`
+* :abbr:`UART (Universal asynchronous receiver-transmitter)`
+* :abbr:`WDT (Watchdog Timer)`
+
+.. figure:: img/we_ophelia1ev_nrf52805.jpg
+     :width: 2000px
+     :align: center
+     :alt: Ophelia-I EV
+
+     Ophelia-I EV (Credit: Würth Elektronik)
+
+Hardware
+********
+
+The Ophelia-I uses the internal low frequency RC oscillator
+and provides the so called smart antenna connection, that allows
+to choose between the module's integrated PCB antenna and an external
+antenna that can be connected to the available SMA connector.
+
+Supported Features
+==================
+
+The we_ophelia1ev_nrf52805 board configuration supports the following
+hardware features:
+
++-----------+------------+----------------------+
+| Interface | Controller | Driver/Component     |
++===========+============+======================+
+| CLOCK     | on-chip    | clock_control        |
++-----------+------------+----------------------+
+| FLASH     | on-chip    | flash                |
++-----------+------------+----------------------+
+| GPIO      | on-chip    | gpio                 |
++-----------+------------+----------------------+
+| I2C(M)    | on-chip    | i2c                  |
++-----------+------------+----------------------+
+| MPU       | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| NVIC      | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| RADIO     | on-chip    | Bluetooth            |
++-----------+------------+----------------------+
+| RTC       | on-chip    | system clock         |
++-----------+------------+----------------------+
+| RTT       | Segger     | console              |
++-----------+------------+----------------------+
+| SPI(M/S)  | on-chip    | spi                  |
++-----------+------------+----------------------+
+| UART      | on-chip    | serial               |
++-----------+------------+----------------------+
+| WDT       | on-chip    | watchdog             |
++-----------+------------+----------------------+
+
+Programming and Debugging
+*************************
+
+Flashing
+========
+
+Follow the instructions in the :ref:`nordic_segger` page to install
+and configure all the necessary software. Further information can be
+found in :ref:`nordic_segger_flashing`. Then build and flash
+applications as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+Here is an example for the :ref:`hello_world` application.
+
+First, run your favorite terminal program to listen for output.
+
+.. code-block:: console
+
+   $ minicom -D <tty_device> -b 115200
+
+Replace :code:`<tty_device>` with the port where the board nRF52 DK
+can be found. For example, under Linux, :code:`/dev/ttyACM0`.
+
+Then build and flash the application in the usual way.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: nrf52dk_nrf52832
+   :goals: build flash
+
+Debugging
+=========
+
+Refer to the :ref:`nordic_segger` page to learn about debugging Nordic boards with a
+Segger IC.
+
+References
+**********
+
+.. target-notes::
+
+.. _Ophelia-I radio module website: https://www.we-online.com/katalog/de/OPHELIA-I
+.. _nRF52805 website: https://www.nordicsemi.com/Products/Low-power-short-range-wireless/nRF52805

boards/arm/we_ophelia1ev_nrf52805/we_ophelia1ev_nrf52805-pinctrl.dtsi

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+&pinctrl {
+	i2c0_default: i2c0_default {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
+				<NRF_PSEL(TWIM_SCL, 0, 18)>;
+		};
+	};
+
+	i2c0_sleep: i2c0_sleep {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
+				<NRF_PSEL(TWIM_SCL, 0, 18)>;
+			low-power-enable;
+		};
+	};
+
+	spi0_default: spi0_default {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 14)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 16)>,
+				<NRF_PSEL(SPIM_MISO, 0, 18)>;
+		};
+	};
+
+	spi0_sleep: spi0_sleep {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 14)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 16)>,
+				<NRF_PSEL(SPIM_MISO, 0, 18)>;
+			low-power-enable;
+		};
+	};
+
+	uart0_default: uart0_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 16)>,
+				<NRF_PSEL(UART_RTS, 0, 4)>;
+		};
+		group2 {
+			psels = <NRF_PSEL(UART_RX, 0, 18)>,
+				<NRF_PSEL(UART_CTS, 0, 14)>;
+			bias-pull-up;
+		};
+	};
+
+	uart0_sleep: uart0_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 16)>,
+				<NRF_PSEL(UART_RX, 0, 18)>,
+				<NRF_PSEL(UART_RTS, 0, 4)>,
+				<NRF_PSEL(UART_CTS, 0, 14)>;
+			low-power-enable;
+		};
+	};
+
+};

boards/arm/we_ophelia1ev_nrf52805/we_ophelia1ev_nrf52805.dts

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+/*
+ * Copyright (c) 2022 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <nordic/nrf52805_caaa.dtsi>
+#include "we_ophelia1ev_nrf52805-pinctrl.dtsi"
+
+/ {
+	model = "we_ophelia1ev_nrf52805";
+	compatible = "we,we-ophelia1ev-nrf52805";
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,uart-mcumgr = &uart0;
+		zephyr,bt-mon-uart = &uart0;
+		zephyr,bt-c2h-uart = &uart0;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led0: led_0 {
+			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+			label = "LED 0";
+		};
+		led1: led_1 {
+			gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+			label = "LED 1";
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+		button0: button_0 {
+			label = "Example button";
+			gpios = <&gpio0 20 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+		};
+	};
+
+	/* These aliases are provided for compatibility with samples */
+	aliases {
+		led0 = &led0;
+		led1 = &led1;
+		sw0 = &button0;
+		bootloader-led0 = &led0;
+	};
+};
+
+&adc {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpiote {
+	status = "okay";
+};
+
+&i2c0 {
+	compatible = "nordic,nrf-twi";
+	status = "okay";
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-1 = <&i2c0_sleep>;
+	pinctrl-names = "default", "sleep";
+};
+
+&spi0 {
+	compatible = "nordic,nrf-spi";
+	status = "okay";
+	pinctrl-0 = <&spi0_default>;
+	pinctrl-1 = <&spi0_sleep>;
+	pinctrl-names = "default", "sleep";
+};
+
+&uart0 {
+	compatible = "nordic,nrf-uarte";
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-1 = <&uart0_sleep>;
+	pinctrl-names = "default", "sleep";
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x00000000 0xc000>;
+		};
+		slot0_partition: partition@c000 {
+			label = "image-0";
+			reg = <0x0000C000 0xd000>;
+		};
+		slot1_partition: partition@19000 {
+			label = "image-1";
+			reg = <0x00019000 0xd000>;
+		};
+		scratch_partition: partition@26000 {
+			label = "image-scratch";
+			reg = <0x00026000 0x3000>;
+		};
+		storage_partition: partition@29000 {
+			label = "storage";
+			reg = <0x00029000 0x00007000>;
+		};
+	};
+};

boards/arm/we_ophelia1ev_nrf52805/we_ophelia1ev_nrf52805.yaml

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+# Copyright (c) 2022 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+identifier: we_ophelia1ev_nrf52805
+name: we_ophelia1ev_nrf52805
+type: mcu
+arch: arm
+ram: 24
+flash: 192
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+supported:
+  - counter
+  - i2c
+  - spi
+  - uart

boards/arm/we_ophelia1ev_nrf52805/we_ophelia1ev_nrf52805_defconfig

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+# Copyright (c) 2022 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_NRF52X=y
+CONFIG_SOC_NRF52805_CAAA=y
+CONFIG_BOARD_WE_OPHELIA1EV_NRF52805=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Additional board options
+CONFIG_GPIO_AS_PINRESET=y
+
+# Use internal oscillator
+CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
+
+CONFIG_PINCTRL=y