tests: drivers: pwm: add pwm configuration for mke17z

Add pwm configuration for frdm_ke17z and frdm_ke17z512 boards.
Set the alias of pwm-0 to ftm2 and test the pwm_api sample.
Update the ftm and pwt configuration to test pwm_loopback sample.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
This commit is contained in:
Anke Xiao 2024-07-15 11:36:18 +08:00 committed by Fabio Baltieri
commit 6987120cc8
4 changed files with 150 additions and 0 deletions

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/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
pwm-0 = &ftm2;
};
};

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/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
pwm-0 = &ftm2;
};
};

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/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
ftm0_default: ftm0_default {
group0 {
pinmux = <FTM0_CH6_PTA17>,
<FTM0_CH2_PTB14>;
drive-strength = "low";
slew-rate = "slow";
};
};
pwt_default: pwt_default {
group0 {
pinmux = <PWT_IN1_PTE11>;
drive-strength = "low";
slew-rate = "slow";
};
};
};
/* To test this sample, connect
* PTB14(J3-11) ---> PTE11(J2-2)
*/
/ {
pwm_loopback_0 {
compatible = "test-pwm-loopback";
pwms = <&ftm0 2 0 PWM_POLARITY_NORMAL>, /* PTB14 J3 pin 11 */
<&pwt 1 0 PWM_POLARITY_NORMAL>; /* PTE11 J2 pin 2 */
};
};
&ftm0 {
status = "okay";
compatible = "nxp,kinetis-ftm-pwm";
clocks = <&scg KINETIS_SCG_SIRC_CLK>;
prescaler = <128>;
#pwm-cells = <3>;
pinctrl-0 = <&ftm0_default>;
pinctrl-names = "default";
clock-source = "system";
};
&pwt {
status = "okay";
prescaler = <32>;
pinctrl-0 = <&pwt_default>;
pinctrl-names = "default";
};
&scg {
core_clk {
clocks = <&sirc_clk>;
};
bus_clk {
clock-div = <2>;
};
};

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/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
ftm0_default: ftm0_default {
group0 {
pinmux = <FTM0_CH6_PTA17>,
<FTM0_CH2_PTB14>;
drive-strength = "low";
slew-rate = "slow";
};
};
pwt_default: pwt_default {
group0 {
pinmux = <PWT_IN1_PTE11>;
drive-strength = "low";
slew-rate = "slow";
};
};
};
/* To test this sample, connect
* PTB14(J3-11) ---> PTE11(J2-11)
*/
/ {
pwm_loopback_0 {
compatible = "test-pwm-loopback";
pwms = <&ftm0 2 0 PWM_POLARITY_NORMAL>, /* PTB14 J3 pin 11 */
<&pwt 1 0 PWM_POLARITY_NORMAL>; /* PTE11 J2 pin 11 */
};
};
&ftm0 {
status = "okay";
compatible = "nxp,kinetis-ftm-pwm";
clocks = <&scg KINETIS_SCG_SIRC_CLK>;
prescaler = <128>;
#pwm-cells = <3>;
pinctrl-0 = <&ftm0_default>;
pinctrl-names = "default";
clock-source = "system";
};
&pwt {
status = "okay";
prescaler = <32>;
pinctrl-0 = <&pwt_default>;
pinctrl-names = "default";
};
&scg {
core_clk {
clocks = <&sirc_clk>;
};
bus_clk {
clock-div = <2>;
};
};