boards: arm: npcx: add support for npcx4m8f_evb
Add support for npcx4m8f_evb board that is a development platform to evaluate the Nuvoton NPCX4 embedded controller. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
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6
boards/arm/npcx4m8f_evb/Kconfig.board
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6
boards/arm/npcx4m8f_evb/Kconfig.board
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# Copyright (c) 2023 Nuvoton Technology Corporation.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NPCX4M8F_EVB
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bool "Nuvoton NPCX4M8F EVB Development board"
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depends on SOC_NPCX4M8F
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15
boards/arm/npcx4m8f_evb/Kconfig.defconfig
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boards/arm/npcx4m8f_evb/Kconfig.defconfig
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# Copyright (c) 2023 Nuvoton Technology Corporation.
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_NPCX4M8F_EVB
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config BOARD
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default "npcx4m8f_evb"
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endif # BOARD_NPCX4M8F_EVB
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config SYS_CLOCK_TICKS_PER_SEC
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default 1000
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config INPUT
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default y if KSCAN
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6
boards/arm/npcx4m8f_evb/board.cmake
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boards/arm/npcx4m8f_evb/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(openocd --cmd-load "npcx_write_image")
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board_runner_args(openocd --cmd-verify "npcx_verify_image")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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131
boards/arm/npcx4m8f_evb/doc/index.rst
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131
boards/arm/npcx4m8f_evb/doc/index.rst
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.. _npcx4m8f_evb:
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Nuvoton NPCX4M8F_EVB
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####################
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Overview
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********
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The NPCX4M8F_EVB kit is a development platform to evaluate the
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Nuvoton NPCX4 series microcontrollers. This board needs to be mated with
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part number NPCX498F.
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.. image:: npcx4m8f_evb.jpg
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:align: center
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:alt: NPCX4M8F Evaluation Board
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Hardware
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********
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- ARM Cortex-M4F Processor
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- 512 KB RAM and 64 KB boot ROM
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- ADC & GPIO headers
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- UART0 and UART1
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- FAN PWM interface
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- Jtag interface
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- Intel Modular Embedded Controller Card (MECC) headers
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Supported Features
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==================
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The following features are supported:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc controller |
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+-----------+------------+-------------------------------------+
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| CLOCK | on-chip | reset and clock control |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c port/controller |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| PM | on-chip | power management |
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+-----------+------------+-------------------------------------+
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| PSL | on-chip | power switch logic |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | pulse width modulator |
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+-----------+------------+-------------------------------------+
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| TACH | on-chip | tachometer sensor |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| WDT | on-chip | watchdog |
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+-----------+------------+-------------------------------------+
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Other hardware features are not currently supported by Zephyr (at the moment)
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The default configuration can be found in the defconfig file:
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``boards/arm/npcx4m8f_evb/npcx4m8f_evb_defconfig``
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Connections and IOs
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===================
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Nuvoton to provide the schematic for this board.
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System Clock
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============
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The NPCX4M8F MCU is configured to use the 120Mhz internal oscillator with the
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on-chip PLL to generate a resulting EC clock rate of 15 MHz. See Processor clock
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control register (chapter 4 in user manual)
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Serial Port
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===========
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UART1 is configured for serial logs.
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Programming and Debugging
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*************************
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This board comes with a Cortex ETM port which facilitates tracing and debugging
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using a single physical connection. In addition, it comes with sockets for
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JTAG-only sessions.
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Flashing
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========
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If the correct headers are installed, this board supports both J-TAG and also
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the ChromiumOS servo.
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To flash using Servo V2, μServo, or Servo V4 (CCD), see the
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`Chromium EC Flashing Documentation`_ for more information.
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To flash with J-TAG, install the drivers for your programmer, for example:
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SEGGER J-link's drivers are at https://www.segger.com/downloads/jlink/
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The openocd from Zephyr SDK 0.16.1 doesn't include npcx4 support, so build openocd from source.::
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sudo apt-get install libftdi-dev libusb-1.0.0-dev
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git clone https://git.code.sf.net/p/openocd/code ~/openocd
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cd ~/openocd
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./bootstrap
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./configure --enable-jlink --enable-ftdi
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make clean
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make
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sudo make install
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Build and flash the blinky sample.::
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west build -t clean && \
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west build -c -p auto -b npcx4m8f_evb samples/basic/blinky && \
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west flash --openocd /usr/local/bin/openocd
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Debugging
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=========
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Use JTAG/SWD with a J-Link
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References
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**********
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.. target-notes::
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.. _Chromium EC Flashing Documentation:
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https://chromium.googlesource.com/chromiumos/platform/ec#Flashing-via-the-servo-debug-board
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BIN
boards/arm/npcx4m8f_evb/doc/npcx4m8f_evb.jpg
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BIN
boards/arm/npcx4m8f_evb/doc/npcx4m8f_evb.jpg
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Binary file not shown.
After Width: | Height: | Size: 94 KiB |
16
boards/arm/npcx4m8f_evb/npcx4m8f_evb-pinctrl.dtsi
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16
boards/arm/npcx4m8f_evb/npcx4m8f_evb-pinctrl.dtsi
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/*
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* Copyright (c) 2023 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nuvoton/npcx/npcx4/npcx4-pinctrl.dtsi>
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&i2c0_0_sda_scl_gpb4_b5 {
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bias-pull-up; /* Enable internal pull-up for i2c0_0 */
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pinmux-locked; /* Lock pinmuxing */
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};
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&pwm6_gpc0 {
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drive-open-drain;
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};
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120
boards/arm/npcx4m8f_evb/npcx4m8f_evb.dts
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boards/arm/npcx4m8f_evb/npcx4m8f_evb.dts
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/*
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* Copyright (c) 2023 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nuvoton/npcx4m8f.dtsi>
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#include "npcx4m8f_evb-pinctrl.dtsi"
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/ {
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model = "Nuvoton NPCX4M8F evaluation board";
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chosen {
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zephyr,sram = &sram0;
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zephyr,console = &uart1;
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zephyr,flash = &flash0;
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zephyr,keyboard-scan = &kscan_input;
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};
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aliases {
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pwm-led0 = &pwm_led0_green;
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led0 = &gpio_led_red;
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pwm-0 = &pwm6;
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i2c-0 = &i2c0_0;
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watchdog0 = &twd0;
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peci-0 = &peci0;
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spi-flash0 = &int_flash;
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kscan0 = &kscan_input;
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};
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leds-pwm {
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compatible = "pwm-leds";
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pwm_led0_green: pwm_led_0 {
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pwms = <&pwm6 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
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label = "User D7 green";
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};
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};
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leds-gpio {
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compatible = "gpio-leds";
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gpio_led_red: led_0 {
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gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;
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label = "User D8 red";
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};
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};
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};
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/* Overwrite default device properties with overlays in board dt file here. */
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&uart1 {
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status = "okay";
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current-speed = <115200>;
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/* Use UART1_SL2 ie. PIN64.65 */
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pinctrl-0 = <&uart1_2_sin_gp64 &uart1_2_sout_gp65>;
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pinctrl-names = "default";
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};
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&pwm6 {
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status = "okay";
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pinctrl-0 = <&pwm6_gpc0>;
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pinctrl-names = "default";
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};
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&adc0 {
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status = "okay";
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/* Use adc0 channel 0 and 2 for 'adc_api' driver tests */
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pinctrl-0 = <&adc0_chan0_gp45 &adc0_chan2_gp43>;
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pinctrl-names = "default";
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};
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&espi0 {
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status = "okay";
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pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>;
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pinctrl-names = "default";
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};
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&i2c0_0 {
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status = "okay";
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pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>;
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pinctrl-names = "default";
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clock-frequency = <I2C_BITRATE_FAST>;
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};
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&i2c_ctrl0 {
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status = "okay";
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};
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&tach1 {
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status = "okay";
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pinctrl-0 = <&ta1_1_in_gp40>;
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pinctrl-names = "default";
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port = <NPCX_TACH_PORT_A>;
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sample-clk = <NPCX_TACH_FREQ_LFCLK>;
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pulses-per-round = <1>;
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};
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&peci0 {
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status = "okay";
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pinctrl-0 = <&peci_dat_gp81>;
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pinctrl-names = "default";
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};
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&kbd {
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/* Demonstrate a 13 x 8 keyboard matrix on evb */
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pinctrl-0 = <&ksi0_gp31 &ksi1_gp30 &ksi2_gp27 &ksi3_gp26
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&ksi4_gp25 &ksi5_gp24 &ksi6_gp23 &ksi7_gp22
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&kso00_gp21 &kso01_gp20 &kso02_gp17 &kso03_gp16
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&kso04_gp15 &kso05_gp14 &kso06_gp13 &kso07_gp12
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&kso08_gp11 &kso09_gp10 &kso10_gp07 &kso11_gp06
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&kso12_gp05>;
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pinctrl-names = "default";
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row-size = <8>;
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col-size = <13>;
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status = "okay";
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kscan_input: kscan-input {
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compatible = "zephyr,kscan-input";
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};
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};
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26
boards/arm/npcx4m8f_evb/npcx4m8f_evb.yaml
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26
boards/arm/npcx4m8f_evb/npcx4m8f_evb.yaml
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#
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# Copyright (c) 2023 Nuvoton Technology Corporation.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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identifier: npcx4m8f_evb
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name: Nuvoton NPCX4M8F EVB
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gnuarmemb
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ram: 114
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flash: 384
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supported:
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- adc
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- clock
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- gpio
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- i2c
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- pm
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- pwm
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- psl
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- tach
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- uart
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- watchdog
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38
boards/arm/npcx4m8f_evb/npcx4m8f_evb_defconfig
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38
boards/arm/npcx4m8f_evb/npcx4m8f_evb_defconfig
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#
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# Copyright (c) 2023 Nuvoton Technology Corporation.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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CONFIG_SOC_NPCX4M8F=y
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CONFIG_SOC_SERIES_NPCX4=y
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CONFIG_BOARD_NPCX4M8F_EVB=y
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# Enable NPCX firmware header
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CONFIG_NPCX_HEADER=y
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CONFIG_NPCX_IMAGE_OUTPUT_HEX=y
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CONFIG_NPCX_HEADER_SPI_MAX_CLOCK_50=y
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CONFIG_NPCX_HEADER_SPI_READ_MODE_DUAL=y
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Clock configuration
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CONFIG_CLOCK_CONTROL=y
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# General Kernel Options
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=15000000
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# UART Driver
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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# GPIO Driver
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CONFIG_GPIO=y
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# Pin Controller Driver
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CONFIG_PINCTRL=y
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# Console Driver
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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15
boards/arm/npcx4m8f_evb/support/openocd.cfg
Normal file
15
boards/arm/npcx4m8f_evb/support/openocd.cfg
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||||||
|
# script for Nuvoton NPCX Cortex-M4 Series
|
||||||
|
|
||||||
|
source [find interface/jlink.cfg]
|
||||||
|
transport select swd
|
||||||
|
|
||||||
|
set FIUNAME npcx_v2.fiu
|
||||||
|
source [find target/npcx.cfg]
|
||||||
|
|
||||||
|
proc npcx_write_image {target_image} {
|
||||||
|
flash write_image erase $target_image 0x64000000 ihex
|
||||||
|
}
|
||||||
|
|
||||||
|
proc npcx_verify_image {target_image} {
|
||||||
|
verify_image $target_image 0x64000000 ihex
|
||||||
|
}
|
32
tests/drivers/adc/adc_api/boards/npcx4m8f_evb.overlay
Normal file
32
tests/drivers/adc/adc_api/boards/npcx4m8f_evb.overlay
Normal file
|
@ -0,0 +1,32 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2023 Benjamin Björnsson <benjamin.bjornsson@gmail.com>
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/ {
|
||||||
|
zephyr,user {
|
||||||
|
io-channels = <&adc0 0>, <&adc0 2>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&adc0 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
channel@0 {
|
||||||
|
reg = <0>;
|
||||||
|
zephyr,gain = "ADC_GAIN_1";
|
||||||
|
zephyr,reference = "ADC_REF_INTERNAL";
|
||||||
|
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
|
||||||
|
zephyr,resolution = <10>;
|
||||||
|
};
|
||||||
|
|
||||||
|
channel@2 {
|
||||||
|
reg = <2>;
|
||||||
|
zephyr,gain = "ADC_GAIN_1";
|
||||||
|
zephyr,reference = "ADC_REF_INTERNAL";
|
||||||
|
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
|
||||||
|
zephyr,resolution = <10>;
|
||||||
|
};
|
||||||
|
};
|
Loading…
Add table
Add a link
Reference in a new issue