From 67ca29a0e726953f6b49628f18eb992526b830a3 Mon Sep 17 00:00:00 2001 From: Dominik Kilian Date: Tue, 4 Sep 2018 15:06:21 +0200 Subject: [PATCH] dts: nrf: Expand nRF DTS to support ARM TrustZone CryptoCell 310 Commit introduces support for ARM TrustZone CryptoCell 310 for Nordic Semiconductor nRF SoCs in device tree. Signed-off-by: Dominik Kilian --- dts/arm/nordic/nrf52840.dtsi | 15 +++++++ dts/bindings/crypto/arm,cryptocell-310.yaml | 44 +++++++++++++++++++++ dts/bindings/crypto/nordic,nrf-cc310.yaml | 32 +++++++++++++++ soc/arm/nordic_nrf/nrf52/dts.fixup | 9 +++++ 4 files changed, 100 insertions(+) create mode 100644 dts/bindings/crypto/arm,cryptocell-310.yaml create mode 100644 dts/bindings/crypto/nordic,nrf-cc310.yaml diff --git a/dts/arm/nordic/nrf52840.dtsi b/dts/arm/nordic/nrf52840.dtsi index dc9fd03994c..04b8ab166e4 100644 --- a/dts/arm/nordic/nrf52840.dtsi +++ b/dts/arm/nordic/nrf52840.dtsi @@ -174,6 +174,21 @@ interrupt-names = "wdt"; label = "WDT"; }; + + cryptocell: crypto@5002a000 { + compatible = "nordic,nrf-cc310"; + reg = <0x5002A000 0x1000>; + label = "CRYPTOCELL"; + status = "ok"; + #address-cells = <1>; + #size-cells = <1>; + cryptocell310: crypto@5002b000 { + compatible = "arm,cryptocell-310"; + reg = <0x5002B000 0x1000>; + interrupts = <42 1>; + label = "CRYTOCELL310"; + }; + }; }; }; diff --git a/dts/bindings/crypto/arm,cryptocell-310.yaml b/dts/bindings/crypto/arm,cryptocell-310.yaml new file mode 100644 index 00000000000..8af0a93d854 --- /dev/null +++ b/dts/bindings/crypto/arm,cryptocell-310.yaml @@ -0,0 +1,44 @@ +# +# Copyright (c) 2018, Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 +# +--- +title: ARM TrustZone CryptoCell 310 +id: arm,cryptocell-310 +version: 0.1 + +description: > + This is a representation of the ARM TrustZone CryptoCell 310 + +properties: + compatible: + type: string + category: required + description: compatible strings + constraint: "arm,cryptocell-310" + generation: define + + reg: + type: int + description: mmio register space + generation: define + category: required + + label: + type: string + category: required + description: Human readable string describing the device (used by Zephyr for API name) + generation: define + + interrupts: + type: array + category: required + description: required interrupts + generation: define + + interrupt-names: + type: stringlist + category: optional + description: readable string describing the interrupts + generation: define diff --git a/dts/bindings/crypto/nordic,nrf-cc310.yaml b/dts/bindings/crypto/nordic,nrf-cc310.yaml new file mode 100644 index 00000000000..f7b51e96611 --- /dev/null +++ b/dts/bindings/crypto/nordic,nrf-cc310.yaml @@ -0,0 +1,32 @@ +# +# Copyright (c) 2018, Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 +# +--- +title: Nordic Control Interface for ARM TrustZone CryptoCell 310 +id: nordic,nrf-cc310 +version: 0.1 + +description: > + This is a representation of the Nordic Control Interface for ARM TrustZone CryptoCell 310 + +properties: + compatible: + type: string + category: required + description: compatible strings + constraint: "nordic,nrf-cc310" + generation: define + + reg: + type: int + description: mmio register space + generation: define + category: required + + label: + type: string + category: required + description: Human readable string describing the device (used by Zephyr for API name) + generation: define diff --git a/soc/arm/nordic_nrf/nrf52/dts.fixup b/soc/arm/nordic_nrf/nrf52/dts.fixup index 65b588d36b9..27947794476 100644 --- a/soc/arm/nordic_nrf/nrf52/dts.fixup +++ b/soc/arm/nordic_nrf/nrf52/dts.fixup @@ -124,6 +124,15 @@ #define CONFIG_WDT_NRF_IRQ NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT #define CONFIG_WDT_NRF_IRQ_PRI NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT_PRIORITY +#if defined(NORDIC_NRF_CC310_5002A000_BASE_ADDRESS) +#define CONFIG_CC310_CTL_BASE_ADDR NORDIC_NRF_CC310_5002A000_BASE_ADDRESS +#define CONFIG_CC310_CTL_NAME NORDIC_NRF_CC310_5002A000_LABEL +#define CONFIG_CC310_BASE_ADDR ARM_CRYPTOCELL_310_5002B000_BASE_ADDRESS +#define CONFIG_CC310_NAME ARM_CRYPTOCELL_310_5002B000_LABEL +#define CONFIG_CC310_IRQ ARM_CRYPTOCELL_310_5002B000_IRQ_0 +#define CONFIG_CC310_IRQ_PRI ARM_CRYPTOCELL_310_5002B000_IRQ_0_PRIORITY +#endif + #define CONFIG_WNCM14A2A_UART_DRV_NAME NORDIC_NRF_UARTE_40028000_WNCM14A2A_BUS_NAME #define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN