boards: arm: enable PWM support for nucleo_f207zg in device tree
Enabling PWM for STM32 nucleo_f207zg in device tree. Signed-off-by: Sidhdharth Yadav <sidhdharth.yadav@hcl.com>
This commit is contained in:
parent
c92775afbd
commit
679df67940
3 changed files with 13 additions and 0 deletions
|
@ -100,6 +100,8 @@ The Zephyr nucleo_207zg board configuration supports the following hardware feat
|
||||||
+-------------+------------+-------------------------------------+
|
+-------------+------------+-------------------------------------+
|
||||||
| Backup SRAM | on-chip | Backup SRAM |
|
| Backup SRAM | on-chip | Backup SRAM |
|
||||||
+-------------+------------+-------------------------------------+
|
+-------------+------------+-------------------------------------+
|
||||||
|
| PWM | on-chip | PWM |
|
||||||
|
+-------------+------------+-------------------------------------+
|
||||||
|
|
||||||
Other hardware features are not yet supported on this Zephyr port.
|
Other hardware features are not yet supported on this Zephyr port.
|
||||||
|
|
||||||
|
@ -154,6 +156,7 @@ Default Zephyr Peripheral Mapping:
|
||||||
- LD3 : PB14
|
- LD3 : PB14
|
||||||
- DAC: PA4
|
- DAC: PA4
|
||||||
- ADC: PA0
|
- ADC: PA0
|
||||||
|
- PWM_1_CH1 : PE9
|
||||||
|
|
||||||
System Clock
|
System Clock
|
||||||
------------
|
------------
|
||||||
|
|
|
@ -115,3 +115,12 @@
|
||||||
&backup_sram {
|
&backup_sram {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&timers1 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
pwm1: pwm {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <&tim1_ch1_pe9>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
|
@ -21,3 +21,4 @@ supported:
|
||||||
- adc
|
- adc
|
||||||
- dac
|
- dac
|
||||||
- backup_sram
|
- backup_sram
|
||||||
|
- pwm
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue