arch/x86: remove support for IAMCU ABI

This ABI is no longer required by any targets and is deprecated.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>

arch/x86/core/Kconfig.ia32

@@ -114,16 +114,6 @@ config X86_BOUNDS_CHECK_BYPASS_MITIGATION
 
 menu "Processor Capabilities"
 
-config X86_IAMCU
-	bool "IAMCU calling convention"
-	help
-	  The IAMCU calling convention changes the X86 C calling convention to
-	  pass some arguments via registers allowing for code size and performance
-	  improvements.  Great care needs to be taken if you have assembly code
-	  that will be called from C or C code called from assembly code, the
-	  assembly code will need to be updated to conform to the new calling
-	  convention.  If in doubt say N
-
 config X86_MMU
 	bool "Enable Memory Management Unit"
 	select MEMORY_PROTECTION

arch/x86/core/ia32.cmake

@@ -3,7 +3,7 @@
 
 if (CMAKE_C_COMPILER_ID STREQUAL "Clang")
   # We rely on GAS for assembling, so don't use the integrated assembler
-  zephyr_compile_options_ifndef(CONFIG_X86_IAMCU $<$<COMPILE_LANGUAGE:ASM>:-no-integrated-as>)
+  zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:-no-integrated-as>)
 elseif(CMAKE_C_COMPILER_ID STREQUAL "GNU")
   zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:-Wa,--divide>)
 endif()

arch/x86/core/ia32/excstub.S

@@ -161,16 +161,9 @@ SECTION_FUNC(TEXT, _exception_enter)
 	sti
 
 allDone:
-#if CONFIG_X86_IAMCU
-	movl	%esp, %eax		/* z_arch_esf_t * parameter */
-#else
 	pushl	%esp			/* push z_arch_esf_t * parameter */
-#endif
 	INDIRECT_CALL(%ecx)		/* call exception handler */
-
-#ifndef CONFIG_X86_IAMCU
 	addl	$0x4, %esp
-#endif
 
 #if defined(CONFIG_LAZY_FP_SHARING)
 

arch/x86/core/ia32/fatal.c

@@ -105,12 +105,8 @@ static void unwind_stack(u32_t base_ptr, u16_t cs)
 		if (frame->ret_addr == 0U) {
 			break;
 		}
-#ifdef CONFIG_X86_IAMCU
-		z_fatal_print("     0x%08x", frame->ret_addr);
-#else
 		z_fatal_print("     0x%08x (0x%x)", frame->ret_addr,
 			      frame->args);
-#endif
 		base_ptr = frame->next;
 	}
 }

arch/x86/core/ia32/intstub.S

@@ -178,12 +178,8 @@ SECTION_FUNC(TEXT, _interrupt_enter)
 
 alreadyOnIntStack:
 
-#ifndef CONFIG_X86_IAMCU
+	push	%eax	/* interrupt handler argument */
-	/* EAX has the interrupt handler argument, needs to go on
+
-	 * stack for sys V calling convention
-	 */
-	push	%eax
-#endif
 #ifdef CONFIG_EXECUTION_BENCHMARKING
 	/* Save the eax and edx registers before reading the time stamp
 	* once done pop the values
@@ -202,10 +198,8 @@ alreadyOnIntStack:
 #endif
 	/* Now call the interrupt handler */
 	INDIRECT_CALL(%edx)
-#ifndef CONFIG_X86_IAMCU
 	/* Discard ISR argument */
 	addl	$0x4, %esp
-#endif
 #ifdef CONFIG_NESTED_INTERRUPTS
 	cli			/* disable interrupts again */
 #endif
@@ -255,16 +249,9 @@ alreadyOnIntStack:
 	call	z_check_stack_sentinel
 #endif
 	pushfl			/* push KERNEL_LOCK_KEY argument */
-#ifdef CONFIG_X86_IAMCU
-	/* IAMCU first argument goes into a register, not the stack.
-	 */
-	popl	%eax
-#endif
 	call	__swap
-
-#ifndef CONFIG_X86_IAMCU
 	addl 	$4, %esp	/* pop KERNEL_LOCK_KEY argument */
-#endif
+
 	/*
 	 * The interrupted thread has now been scheduled,
 	 * as the result of a _later_ invocation of __swap().
@@ -331,12 +318,7 @@ handle_idle:
 	pushl	%eax
 	pushl	%edx
 	/* Populate 'ticks' argument to z_sys_power_save_idle_exit */
-#ifdef CONFIG_X86_IAMCU
-	movl	_kernel_offset_to_idle(%ecx), %eax
-#else
-	/* SYS V calling convention */
 	push	_kernel_offset_to_idle(%ecx)
-#endif
 	/* Zero out _kernel.idle */
 	movl	$0, _kernel_offset_to_idle(%ecx)
 
@@ -348,10 +330,8 @@ handle_idle:
 	 */
 
 	call	z_sys_power_save_idle_exit
-#ifndef CONFIG_X86_IAMCU
+	/* discard 'ticks' argument passed on the stack */
-	/* SYS V: discard 'ticks' argument passed on the stack */
 	add	$0x4, %esp
-#endif
 	popl	%edx
 	popl	%eax
 	jmp	alreadyOnIntStack
@@ -409,11 +389,7 @@ SECTION_FUNC(TEXT, z_SpuriousIntHandler)
 	leal	44(%esp), %ecx   /* Calculate ESP before exception occurred */
 	pushl	%ecx             /* Save calculated ESP */
 
-#ifndef CONFIG_X86_IAMCU
+	pushl	%esp		/* push cur stack pointer: pEsf arg */
-	pushl	%esp			/* push cur stack pointer: pEsf arg */
-#else
-	mov	%esp, %eax
-#endif
 
 	/* re-enable interrupts */
 	sti

arch/x86/core/ia32/swap.S

@@ -97,13 +97,6 @@ SECTION_FUNC(TEXT, __swap)
 	mov %edx,__start_swap_time+4
 	pop %edx
 	pop %eax
-#endif
-#ifdef CONFIG_X86_IAMCU
-	/* save EFLAGS on stack right before return address, just as SYSV would
-	 * have done
-	 */
-	pushl	0(%esp)
-	movl	%eax, 4(%esp)
 #endif
 	/*
 	 * Push all non-volatile registers onto the stack; do not copy
@@ -150,17 +143,10 @@ SECTION_FUNC(TEXT, __swap)
 	 */
 #if defined(CONFIG_X86_USERSPACE) && !defined(CONFIG_X86_KPTI)
 
-#ifdef CONFIG_X86_IAMCU
 	push	%eax
-#else
-	push	%eax
-#endif
 	call	z_x86_swap_update_page_tables
-#ifdef CONFIG_X86_IAMCU
 	pop	%eax
-#else
+
-	pop	%eax
-#endif
 	/* Page tables updated. All memory access after this point needs to be
 	 * to memory that has the same mappings and access attributes wrt
 	 * supervisor mode!
@@ -379,14 +365,6 @@ CROHandlingDone:
 
 	pushl	4(%esp)
 	popfl
-#if CONFIG_X86_IAMCU
-	/* Remember that eflags we stuck into the stack before the return
-	 * address? need to get it out of there since the calling convention
-	 * will not do that for us.
-	 */
-	popl	%edx
-	movl	%edx, (%esp)
-#endif
 
 #ifdef CONFIG_EXECUTION_BENCHMARKING
 	/* Save the eax and edx registers before reading the time stamp
@@ -409,17 +387,13 @@ time_read_not_needed:
  *
  * This function adjusts the initial stack frame created by z_new_thread() such
  * that the GDB stack frame unwinders recognize it as the outermost frame in
- * the thread's stack.  For targets that use the IAMCU calling convention, the
+ * the thread's stack.
- * first three arguments are popped into eax, edx, and ecx. The function then
- * jumps to z_thread_entry().
  *
  * GDB normally stops unwinding a stack when it detects that it has
  * reached a function called main().  Kernel threads, however, do not have
  * a main() function, and there does not appear to be a simple way of stopping
  * the unwinding of the stack.
  *
- * SYS V Systems:
- *
  * Given the initial thread created by z_new_thread(), GDB expects to find a
  * return address on the stack immediately above the thread entry routine
  * z_thread_entry, in the location occupied by the initial EFLAGS.
@@ -436,15 +410,6 @@ time_read_not_needed:
  * first time that the new thread is swapped in, and it jumps to
  * z_thread_entry after it has done its work.
  *
- * IAMCU Systems:
- *
- * There is no EFLAGS on the stack when we get here. z_thread_entry() takes
- * four arguments, and we need to pop off the first three into the
- * appropriate registers. Instead of using the 'call' instruction, we push
- * a NULL return address onto the stack and jump into z_thread_entry,
- * ensuring the stack won't be unwound further. Placing some kind of return
- * address on the stack is mandatory so this isn't conditionally compiled.
- *
  *       __________________
  *      |      param3      |   <------ Top of the stack
  *      |__________________|
@@ -452,10 +417,10 @@ time_read_not_needed:
  *      |__________________|                  |
  *      |      param1      |                  V
  *      |__________________|
- *      |      pEntry      |  <----   ESP when invoked by z_swap() on IAMCU
+ *      |      pEntry      |
  *      |__________________|
- *      | initial EFLAGS   |  <----   ESP when invoked by z_swap() on Sys V
+ *      | initial EFLAGS   |  <----   ESP when invoked by z_swap()
- *      |__________________|             (Zeroed by this routine on Sys V)
+ *      |__________________|             (Zeroed by this routine)
  *
  * The address of the thread entry function needs to be in %edi when this is
  * invoked. It will either be z_thread_entry, or if userspace is enabled,
@@ -465,15 +430,6 @@ time_read_not_needed:
  */
 
 SECTION_FUNC(TEXT, z_x86_thread_entry_wrapper)
-#ifdef CONFIG_X86_IAMCU
-	/* IAMCU calling convention has first 3 arguments supplied in
-	 * registers not the stack
-	 */
-	pop	%eax
-	pop	%edx
-	pop	%ecx
-	push	$0	 /* Null return address */
-#endif
 	movl	$0, (%esp)
 	INDIRECT_JMP(%edi)
 #endif /* _THREAD_WRAPPER_REQUIRED */

arch/x86/core/ia32/userspace.S

@@ -218,11 +218,9 @@ _id_ok:
 	push	%ebp		/* arg6 */
 	push	%edi		/* arg5 */
 	push	%ebx		/* arg4 */
-#ifndef CONFIG_X86_IAMCU
 	push	%ecx		/* arg3 */
 	push	%edx		/* arg2	*/
 	push	%eax		/* arg1 */
-#endif
 
 	/* from the call ID in ESI, load EBX with the actual function pointer
 	 * to call by looking it up in the system call dispatch table
@@ -236,20 +234,13 @@ _id_ok:
 	/* EAX now contains return value. Pop or xor everything else to prevent
 	 * information leak from kernel mode.
 	 */
-#ifndef CONFIG_X86_IAMCU
 	pop	%edx		/* old arg1 value, discard it */
 	pop	%edx
 	pop	%ecx
-#endif
 	pop	%ebx
 	pop	%edi
-#ifndef CONFIG_X86_IAMCU
 	/* Discard ssf and arg6 */
 	add	$8, %esp
-#else
-	pop	%ecx		/* Clean ECX and get arg6 off the stack */
-	pop	%edx		/* Clean EDX and get ssf off the stack */
-#endif
 	KPTI_IRET_USER
 
 _bad_syscall:
@@ -314,11 +305,9 @@ SECTION_FUNC(TEXT, z_x86_userspace_enter)
 	pop	%esi	/* Discard return address on stack */
 
 	/* Fetch parameters on the stack */
-#ifndef CONFIG_X86_IAMCU
 	pop	%eax	/* user_entry */
 	pop	%edx	/* p1 */
 	pop	%ecx	/* p2 */
-#endif
 	pop	%esi	/* p3 */
 	pop	%ebx	/* stack_end (high address) */
 	pop	%edi	/* stack_start (low address) */
@@ -377,11 +366,9 @@ SECTION_FUNC(TEXT, z_x86_userspace_enter)
 
 	/* Push arguments to z_thread_entry() */
 	push	%esi	/* p3 */
-#ifndef CONFIG_X86_IAMCU
 	push	%ecx	/* p2 */
 	push	%edx	/* p1 */
 	push	%eax	/* user_entry */
-#endif
 	/* NULL return address */
 	push	$0
 

arch/x86/ia32.cmake

@@ -9,23 +9,11 @@ else()
   zephyr_compile_definitions(PERF_OPT)
 endif()
 
-if(CONFIG_X86_IAMCU)
+set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_ARCH "i386")
-  set_property(GLOBAL APPEND PROPERTY PROPERTY_LINKER_SCRIPT_DEFINES -D__IAMCU)
+set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-i386")
-  set_property(GLOBAL        PROPERTY PROPERTY_OUTPUT_FORMAT         "elf32-iamcu")
-  set_property(GLOBAL        PROPERTY PROPERTY_OUTPUT_ARCH           "iamcu:intel")
-else()
-  set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_ARCH "i386")
-  set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-i386")
-endif()
-
-
 
 if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
-  if(CONFIG_X86_IAMCU)
+  zephyr_compile_options(-Qunused-arguments)
-    zephyr_compile_options(-miamcu)
-  else()
-    zephyr_compile_options(-Qunused-arguments)
-  endif()
 
   zephyr_cc_option(
     -m32

arch/x86/include/ia32/kernel_arch_data.h

@@ -42,11 +42,10 @@
 /* Some configurations require that the stack/registers be adjusted before
  * z_thread_entry. See discussion in swap.S for z_x86_thread_entry_wrapper()
  */
-#if defined(CONFIG_X86_IAMCU) || defined(CONFIG_DEBUG_INFO)
+#if defined(CONFIG_DEBUG_INFO)
 #define _THREAD_WRAPPER_REQUIRED
 #endif
 
-
 /* increase to 16 bytes (or more?) to support SSE/SSE2 instructions? */
 
 #define STACK_ALIGN_SIZE 4

boards/x86/acrn/Kconfig.board

@@ -7,5 +7,5 @@
 config BOARD_ACRN
 	bool "ACRN User OS"
 	depends on SOC_IA32
-	select CPU_HAS_FPU if !X86_IAMCU
+	select CPU_HAS_FPU
 	select SET_GDT

boards/x86/qemu_x86/Kconfig.board

@@ -13,11 +13,3 @@ config BOARD_QEMU_X86
 	select CPU_HAS_FPU
 	select HAS_COVERAGE_SUPPORT
 	select XIP
-
-config BOARD_QEMU_X86_IAMCU
-	bool "QEMU x86 (IAMCU ABI)"
-	depends on SOC_IA32
-	select QEMU_TARGET
-	select HAS_DTS_ETHERNET
-	select HAS_COVERAGE_SUPPORT
-	select XIP

boards/x86/qemu_x86/Kconfig.defconfig

@@ -17,21 +17,3 @@ config FLASH_SIMULATOR
 endif
 
 endif # BOARD_QEMU_X86
-
-if BOARD_QEMU_X86_IAMCU
-
-config BUILD_OUTPUT_BIN
-        default n
-
-config BOARD
-	default "qemu_x86_iamcu"
-
-# Enabled here because IAMCU targets run on some Quark CPUs that are immune to
-# these attacks, and the compiler doesn't even recognize instructions like
-# 'lfence'
-# We set this here because the QEMU targets derive from the generic IA32 SOC
-# definition and not a specific CPU; this is normally set at the SOC level.
-config X86_NO_SPECULATIVE_VULNERABILITIES
-	default y
-
-endif # BOARD_QEMU_X86_IAMCU

boards/x86/qemu_x86/qemu_x86_iamcu.dts

@@ -1,3 +0,0 @@
-/* SPDX-License-Identifier: Apache-2.0 */
-
-#include "qemu_x86.dts"

boards/x86/qemu_x86/qemu_x86_iamcu.yaml

@@ -1,11 +0,0 @@
-identifier: qemu_x86_iamcu
-name: QEMU Emulation for X86 (IAMCU)
-type: qemu
-arch: x86
-toolchain:
-  - zephyr
-  - xtools
-testing:
-  ignore_tags:
-     - net
-     - bluetooth

boards/x86/qemu_x86/qemu_x86_iamcu_defconfig

@@ -1,19 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-CONFIG_X86=y
-CONFIG_SOC_IA32=y
-CONFIG_BOARD_QEMU_X86_IAMCU=y
-CONFIG_CPU_MINUTEIA=y
-CONFIG_HPET_TIMER=y
-CONFIG_HPET_TIMER_IRQ=2
-CONFIG_PIC_DISABLE=y
-CONFIG_LOAPIC=y
-CONFIG_CONSOLE=y
-CONFIG_SERIAL=y
-CONFIG_UART_NS16550=y
-CONFIG_UART_CONSOLE=y
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
-CONFIG_X86_IAMCU=y
-CONFIG_X86_MMU=y
-CONFIG_X86_MMU_PAGE_POOL_PAGES=15
-CONFIG_DEBUG_INFO=y

cmake/compiler/host-gcc/target.cmake

@@ -43,13 +43,6 @@ if (CONFIG_X86)
     OUTPUT_STRIP_TRAILING_WHITESPACE
     )
   assert_exists(LIBGCC_FILE_NAME)
-
-# While most x86_64 Linux distributions implement "multilib" and have
-# 32 bits libraries off the shelf, things like
-# "/usr/lib/gcc/x86_64-linux-gnu/7/IAMCU/libgcc.a" are unheard of.
-# So this fails CONFIG_X86_IAMCU=y with a "cannot find -lgcc" error which
-# is clearer than "undefined reference to __udivdi3, etc."
-  LIST(APPEND TOOLCHAIN_LIBS gcc)
 endif()
 
 set(NOSTDINC "")

cmake/emu/qemu.cmake

@@ -233,15 +233,6 @@ elseif(QEMU_NET_STACK)
   endif()
 endif(QEMU_PIPE_STACK)
 
-if(CONFIG_X86_IAMCU)
-  list(APPEND PRE_QEMU_COMMANDS
-    COMMAND
-    ${PYTHON_EXECUTABLE}
-    ${ZEPHYR_BASE}/scripts/qemu-machine-hack.py
-    $<TARGET_FILE:${logical_target_for_zephyr_elf}>
-    )
-endif()
-
 if(CONFIG_X86_64)
   set(QEMU_KERNEL_FILE "${CMAKE_BINARY_DIR}/zephyr-qemu.elf")
 endif()

cmake/toolchain/xtools/target.cmake

@@ -1,12 +1,5 @@
 # SPDX-License-Identifier: Apache-2.0
 
-# Determine if we have an IAMCU toolchain or not.
-if(CONFIG_X86_IAMCU)
-  set(CROSS_COMPILE_TARGET_x86  i586-zephyr-elfiamcu)
-else()
-  set(CROSS_COMPILE_TARGET_x86 i586-zephyr-elf)
-endif()
-
 set(CROSS_COMPILE_TARGET_arm         arm-zephyr-eabi)
 set(CROSS_COMPILE_TARGET_nios2     nios2-zephyr-elf)
 set(CROSS_COMPILE_TARGET_riscv   riscv32-zephyr-elf)
@@ -14,6 +7,7 @@ set(CROSS_COMPILE_TARGET_mips     mipsel-zephyr-elf)
 set(CROSS_COMPILE_TARGET_xtensa   xtensa-zephyr-elf)
 set(CROSS_COMPILE_TARGET_arc         arc-zephyr-elf)
 set(CROSS_COMPILE_TARGET_x86_64   x86_64-zephyr-elf)
+set(CROSS_COMPILE_TARGET_x86        i586-zephyr-elf)
 
 set(CROSS_COMPILE_TARGET ${CROSS_COMPILE_TARGET_${ARCH}})
 set(SYSROOT_TARGET       ${CROSS_COMPILE_TARGET})

cmake/toolchain/zephyr/0.10/target.cmake

@@ -1,12 +1,5 @@
 # SPDX-License-Identifier: Apache-2.0
 
-# Determine if we have an IAMCU toolchain or not.
-if(CONFIG_X86_IAMCU)
-  set(CROSS_COMPILE_TARGET_x86  i586-zephyr-elfiamcu)
-else()
-  set(CROSS_COMPILE_TARGET_x86 i586-zephyr-elf)
-endif()
-
 set(CROSS_COMPILE_TARGET_arm         arm-zephyr-eabi)
 set(CROSS_COMPILE_TARGET_nios2     nios2-zephyr-elf)
 set(CROSS_COMPILE_TARGET_riscv   riscv64-zephyr-elf)
@@ -14,6 +7,7 @@ set(CROSS_COMPILE_TARGET_mips     mipsel-zephyr-elf)
 set(CROSS_COMPILE_TARGET_xtensa   xtensa-zephyr-elf)
 set(CROSS_COMPILE_TARGET_arc         arc-zephyr-elf)
 set(CROSS_COMPILE_TARGET_x86_64   x86_64-zephyr-elf)
+set(CROSS_COMPILE_TARGET_x86        i586-zephyr-elf)
 
 set(CROSS_COMPILE_TARGET ${CROSS_COMPILE_TARGET_${ARCH}})
 set(SYSROOT_TARGET       ${CROSS_COMPILE_TARGET})

doc/getting_started/installation_linux.rst

@@ -169,8 +169,6 @@ following target architectures:
 
 * :abbr:`X86 (Intel Architecture 32 bits)`
 
-* :abbr:`X86 IAMCU ABI (Intel Architecture 32 bits IAMCU ABI)`
-
 * :abbr:`Arm (Advanced RISC Machine)`
 
 * :abbr:`ARC (Argonaut RISC Core)`

doc/guides/porting/arch.rst

@@ -10,7 +10,6 @@ Interface)` that is not currently supported.
 The following are examples of ISAs and ABIs that Zephyr supports:
 
 * x86_32 ISA with System V ABI
-* x86_32 ISA with IAMCU ABI
 * ARMv7-M ISA with Thumb2 instruction set and ARM Embedded ABI (aeabi)
 * ARCv2 ISA
 

include/arch/x86/ia32/syscall.h

@@ -32,8 +32,6 @@ extern "C" {
 /* Syscall invocation macros. x86-specific machine constraints used to ensure
  * args land in the proper registers, see implementation of
  * z_x86_syscall_entry_stub in userspace.S
- *
- * the entry stub clobbers EDX and ECX on IAMCU systems
  */
 
 static inline u32_t z_arch_syscall_invoke6(u32_t arg1, u32_t arg2, u32_t arg3,
@@ -47,9 +45,6 @@ static inline u32_t z_arch_syscall_invoke6(u32_t arg1, u32_t arg2, u32_t arg3,
 			 "int $0x80\n\t"
 			 "pop %%ebp\n\t"
 			 : "=a" (ret)
-#ifdef CONFIG_X86_IAMCU
-			   , "=d" (arg2), "=c" (arg3)
-#endif
 			 : "S" (call_id), "a" (arg1), "d" (arg2),
 			   "c" (arg3), "b" (arg4), "D" (arg5),
 			   [arg6] "m" (arg6)
@@ -64,9 +59,6 @@ static inline u32_t z_arch_syscall_invoke5(u32_t arg1, u32_t arg2, u32_t arg3,
 
 	__asm__ volatile("int $0x80"
 			 : "=a" (ret)
-#ifdef CONFIG_X86_IAMCU
-			   , "=d" (arg2), "=c" (arg3)
-#endif
 			 : "S" (call_id), "a" (arg1), "d" (arg2),
 			   "c" (arg3), "b" (arg4), "D" (arg5)
 			 : "memory");
@@ -80,9 +72,6 @@ static inline u32_t z_arch_syscall_invoke4(u32_t arg1, u32_t arg2, u32_t arg3,
 
 	__asm__ volatile("int $0x80"
 			 : "=a" (ret)
-#ifdef CONFIG_X86_IAMCU
-			   , "=d" (arg2), "=c" (arg3)
-#endif
 			 : "S" (call_id), "a" (arg1), "d" (arg2), "c" (arg3),
 			   "b" (arg4)
 			 : "memory");
@@ -96,9 +85,6 @@ static inline u32_t z_arch_syscall_invoke3(u32_t arg1, u32_t arg2, u32_t arg3,
 
 	__asm__ volatile("int $0x80"
 			 : "=a" (ret)
-#ifdef CONFIG_X86_IAMCU
-			   , "=d" (arg2), "=c" (arg3)
-#endif
 			 : "S" (call_id), "a" (arg1), "d" (arg2), "c" (arg3)
 			 : "memory");
 	return ret;
@@ -110,14 +96,8 @@ static inline u32_t z_arch_syscall_invoke2(u32_t arg1, u32_t arg2, u32_t call_id
 
 	__asm__ volatile("int $0x80"
 			 : "=a" (ret)
-#ifdef CONFIG_X86_IAMCU
-			   , "=d" (arg2)
-#endif
 			 : "S" (call_id), "a" (arg1), "d" (arg2)
 			 : "memory"
-#ifdef CONFIG_X86_IAMCU
-			 , "ecx"
-#endif
 			 );
 	return ret;
 }
@@ -130,9 +110,6 @@ static inline u32_t z_arch_syscall_invoke1(u32_t arg1, u32_t call_id)
 			 : "=a" (ret)
 			 : "S" (call_id), "a" (arg1)
 			 : "memory"
-#ifdef CONFIG_X86_IAMCU
-			 , "edx", "ecx"
-#endif
 			 );
 	return ret;
 }
@@ -145,9 +122,6 @@ static inline u32_t z_arch_syscall_invoke0(u32_t call_id)
 			 : "=a" (ret)
 			 : "S" (call_id)
 			 : "memory"
-#ifdef CONFIG_X86_IAMCU
-			 , "edx", "ecx"
-#endif
 			 );
 	return ret;
 }

include/linker/linker-tool-gcc.h

@@ -25,13 +25,8 @@
 #elif defined(CONFIG_ARC)
 	OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
 #elif defined(CONFIG_X86)
-	#if  defined(__IAMCU)
+	OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-		OUTPUT_FORMAT("elf32-iamcu")
+	OUTPUT_ARCH("i386")
-		OUTPUT_ARCH("iamcu:intel")
-	#else
-		OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-		OUTPUT_ARCH("i386")
-	#endif
 #elif defined(CONFIG_NIOS2)
 	OUTPUT_FORMAT("elf32-littlenios2", "elf32-bignios2", "elf32-littlenios2")
 #elif defined(CONFIG_RISCV)

scripts/qemu-machine-hack.py

@@ -1,13 +0,0 @@
-#!/usr/bin/env python3
-# SPDX-License-Identifier: Apache-2.0
-
-import sys
-
-# For some baffling reason IAMCU sets the instruction set architecture
-# in the ELF header to 0x06 instead of 0x03 even though it is just
-# 386 code. This gives QEMU fits. Hack it!
-fd = open(sys.argv[1], "r+b")
-fd.seek(0x12)
-# Write 0x03 which is EM_386 to e_machine
-fd.write(b'\x03')
-fd.close()

soc/x86/ia32/CMakeLists.txt

@@ -5,8 +5,4 @@ zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)
 
 zephyr_cc_option(-march=pentium)
 
-if(CONFIG_X86_IAMCU)
-  zephyr_cc_option(-msoft-float)
-endif()
-
 zephyr_library_sources(soc.c)