From 673f38f3d1ccbb8d66edce195805deae439272d4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Manuel=20Arg=C3=BCelles?= Date: Tue, 5 Dec 2023 18:07:27 +0700 Subject: [PATCH] soc: arm: nxp_s32: s32k1: unselect CPU_HAS_xCACHE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Following changes in #64978, align CPU_HAS_xCACHE symbols with the CMSIS feature definitions in the device headers so that both have the same value. Fixes #66147 Signed-off-by: Manuel Argüelles --- soc/arm/nxp_s32/s32k1/Kconfig.soc | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/soc/arm/nxp_s32/s32k1/Kconfig.soc b/soc/arm/nxp_s32/s32k1/Kconfig.soc index 83a2b59d67c..dd1cdf77538 100644 --- a/soc/arm/nxp_s32/s32k1/Kconfig.soc +++ b/soc/arm/nxp_s32/s32k1/Kconfig.soc @@ -20,48 +20,36 @@ config SOC_S32K142 select CPU_CORTEX_M4 select CPU_CORTEX_M_HAS_DWT select CPU_HAS_FPU - select CPU_HAS_DCACHE - select CPU_HAS_ICACHE config SOC_S32K142W bool "S32K142W" select CPU_CORTEX_M4 select CPU_CORTEX_M_HAS_DWT select CPU_HAS_FPU - select CPU_HAS_DCACHE - select CPU_HAS_ICACHE config SOC_S32K144 bool "S32K144" select CPU_CORTEX_M4 select CPU_CORTEX_M_HAS_DWT select CPU_HAS_FPU - select CPU_HAS_DCACHE - select CPU_HAS_ICACHE config SOC_S32K144W bool "S32K144W" select CPU_CORTEX_M4 select CPU_CORTEX_M_HAS_DWT select CPU_HAS_FPU - select CPU_HAS_DCACHE - select CPU_HAS_ICACHE config SOC_S32K146 bool "S32K146" select CPU_CORTEX_M4 select CPU_CORTEX_M_HAS_DWT select CPU_HAS_FPU - select CPU_HAS_DCACHE - select CPU_HAS_ICACHE config SOC_S32K148 bool "S32K148" select CPU_CORTEX_M4 select CPU_CORTEX_M_HAS_DWT select CPU_HAS_FPU - select CPU_HAS_DCACHE - select CPU_HAS_ICACHE endchoice