stm32: uart: Add DTS support to STM32 UART driver
This patch adds device tree support to the STM32 UART driver. The base address, interrupt, and interrupt priority values can now come from DTS. Change-Id: I3c383da8b200037601ecb2dc087f99ef103761bb Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Andy Gross
Anas Nashif
parent
1e92c22a13
commit
670aa0cc99
3 changed files with 49 additions and 3 deletions
|
|
@ -33,6 +33,7 @@ config UART_STM32_PORT_1_NAME
|
|||
This is the device name for USART1 port, and is
|
||||
included in the device struct.
|
||||
|
||||
if !HAS_DTS
|
||||
config UART_STM32_PORT_1_BAUD_RATE
|
||||
int "STM32 USART1 Baud Rate"
|
||||
default 9600
|
||||
|
|
@ -47,6 +48,7 @@ config UART_STM32_PORT_1_IRQ_PRI
|
|||
help
|
||||
The interrupt priority for USART1 port.
|
||||
|
||||
endif # !HAS_DTS
|
||||
# --- port 2 ---
|
||||
|
||||
config UART_STM32_PORT_2
|
||||
|
|
@ -65,6 +67,7 @@ config UART_STM32_PORT_2_NAME
|
|||
This is the device name for USART2 port, and is
|
||||
included in the device struct.
|
||||
|
||||
if !HAS_DTS
|
||||
config UART_STM32_PORT_2_BAUD_RATE
|
||||
int "STM32 USART2 Baud Rate"
|
||||
default 9600
|
||||
|
|
@ -79,6 +82,8 @@ config UART_STM32_PORT_2_IRQ_PRI
|
|||
help
|
||||
The interrupt priority for USART2 port.
|
||||
|
||||
endif # !HAS_DTS
|
||||
|
||||
# --- port 3 ---
|
||||
|
||||
config UART_STM32_PORT_3
|
||||
|
|
@ -97,6 +102,7 @@ config UART_STM32_PORT_3_NAME
|
|||
This is the device name for USART3 port, and is
|
||||
included in the device struct.
|
||||
|
||||
if !HAS_DTS
|
||||
config UART_STM32_PORT_3_BAUD_RATE
|
||||
int "STM32 USART3 Baud Rate"
|
||||
default 9600
|
||||
|
|
@ -110,3 +116,5 @@ config UART_STM32_PORT_3_IRQ_PRI
|
|||
depends on UART_STM32_PORT_3 && UART_INTERRUPT_DRIVEN
|
||||
help
|
||||
The interrupt priority for USART3 port.
|
||||
|
||||
endif # !HAS_DTS
|
||||
|
|
|
|||
|
|
@ -36,6 +36,11 @@
|
|||
#define UART_STRUCT(dev) \
|
||||
((USART_TypeDef *)(DEV_CFG(dev))->uconf.base)
|
||||
|
||||
#ifndef CONFIG_HAS_DTS
|
||||
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS USART1_BASE
|
||||
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS USART2_BASE
|
||||
#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS USART3_BASE
|
||||
#endif
|
||||
|
||||
#define TIMEOUT 1000
|
||||
|
||||
|
|
@ -320,7 +325,7 @@ static void uart_stm32_irq_config_func_1(struct device *dev);
|
|||
|
||||
static const struct uart_stm32_config uart_stm32_dev_cfg_1 = {
|
||||
.uconf = {
|
||||
.base = (uint8_t *)USART1_BASE,
|
||||
.base = (uint8_t *)CONFIG_UART_STM32_PORT_1_BASE_ADDRESS,
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = uart_stm32_irq_config_func_1,
|
||||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
|
|
@ -352,6 +357,8 @@ DEVICE_AND_API_INIT(uart_stm32_1, CONFIG_UART_STM32_PORT_1_NAME,
|
|||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void uart_stm32_irq_config_func_1(struct device *dev)
|
||||
{
|
||||
|
||||
#ifndef CONFIG_HAS_DTS
|
||||
#ifdef CONFIG_SOC_SERIES_STM32F1X
|
||||
#define PORT_1_IRQ STM32F1_IRQ_USART1
|
||||
#elif CONFIG_SOC_SERIES_STM32F3X
|
||||
|
|
@ -360,6 +367,7 @@ static void uart_stm32_irq_config_func_1(struct device *dev)
|
|||
#define PORT_1_IRQ STM32F4_IRQ_USART1
|
||||
#elif CONFIG_SOC_SERIES_STM32L4X
|
||||
#define PORT_1_IRQ STM32L4_IRQ_USART1
|
||||
#endif
|
||||
#endif
|
||||
IRQ_CONNECT(PORT_1_IRQ,
|
||||
CONFIG_UART_STM32_PORT_1_IRQ_PRI,
|
||||
|
|
@ -380,7 +388,7 @@ static void uart_stm32_irq_config_func_2(struct device *dev);
|
|||
|
||||
static const struct uart_stm32_config uart_stm32_dev_cfg_2 = {
|
||||
.uconf = {
|
||||
.base = (uint8_t *)USART2_BASE,
|
||||
.base = (uint8_t *)CONFIG_UART_STM32_PORT_2_BASE_ADDRESS,
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = uart_stm32_irq_config_func_2,
|
||||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
|
|
@ -412,6 +420,8 @@ DEVICE_AND_API_INIT(uart_stm32_2, CONFIG_UART_STM32_PORT_2_NAME,
|
|||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void uart_stm32_irq_config_func_2(struct device *dev)
|
||||
{
|
||||
|
||||
#ifndef CONFIG_HAS_DTS
|
||||
#ifdef CONFIG_SOC_SERIES_STM32F1X
|
||||
#define PORT_2_IRQ STM32F1_IRQ_USART2
|
||||
#elif CONFIG_SOC_SERIES_STM32F3X
|
||||
|
|
@ -420,6 +430,7 @@ static void uart_stm32_irq_config_func_2(struct device *dev)
|
|||
#define PORT_2_IRQ STM32F4_IRQ_USART2
|
||||
#elif CONFIG_SOC_SERIES_STM32L4X
|
||||
#define PORT_2_IRQ STM32L4_IRQ_USART2
|
||||
#endif
|
||||
#endif
|
||||
IRQ_CONNECT(PORT_2_IRQ,
|
||||
CONFIG_UART_STM32_PORT_2_IRQ_PRI,
|
||||
|
|
@ -440,7 +451,7 @@ static void uart_stm32_irq_config_func_3(struct device *dev);
|
|||
|
||||
static const struct uart_stm32_config uart_stm32_dev_cfg_3 = {
|
||||
.uconf = {
|
||||
.base = (uint8_t *)USART3_BASE,
|
||||
.base = (uint8_t *)CONFIG_UART_STM32_PORT_3_BASE_ADDRESS,
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = uart_stm32_irq_config_func_3,
|
||||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
|
|
@ -471,6 +482,7 @@ DEVICE_AND_API_INIT(uart_stm32_3, CONFIG_UART_STM32_PORT_3_NAME,
|
|||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void uart_stm32_irq_config_func_3(struct device *dev)
|
||||
{
|
||||
#ifndef CONFIG_HAS_DTS
|
||||
#ifdef CONFIG_SOC_SERIES_STM32F1X
|
||||
#define PORT_3_IRQ STM32F1_IRQ_USART3
|
||||
#elif CONFIG_SOC_SERIES_STM32F3X
|
||||
|
|
@ -479,6 +491,7 @@ static void uart_stm32_irq_config_func_3(struct device *dev)
|
|||
#define PORT_3_IRQ STM32F4_IRQ_USART3
|
||||
#elif CONFIG_SOC_SERIES_STM32L4X
|
||||
#define PORT_3_IRQ STM32L4_IRQ_USART3
|
||||
#endif
|
||||
#endif
|
||||
IRQ_CONNECT(PORT_3_IRQ,
|
||||
CONFIG_UART_STM32_PORT_3_IRQ_PRI,
|
||||
|
|
|
|||
|
|
@ -7,3 +7,28 @@
|
|||
|
||||
#define CONFIG_NUM_IRQS ARM_ARMV7M_NVIC_E000E100_NUM_IRQS
|
||||
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_ARMV7M_NVIC_E000E100_NUM_IRQ_PRIO_BITS
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_BAUD_RATE
|
||||
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40013800_ZEPHYR_IRQ_PRIO
|
||||
#define PORT_1_IRQ ST_STM32_USART_40013800_IRQ_0
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_BAUD_RATE
|
||||
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_ZEPHYR_IRQ_PRIO
|
||||
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_3_BAUD_RATE ST_STM32_USART_40004800_BAUD_RATE
|
||||
#define CONFIG_UART_STM32_PORT_3_IRQ_PRI ST_STM32_USART_40004800_ZEPHYR_IRQ_PRIO
|
||||
#define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_USART_40004C00_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_USART_40004C00_BAUD_RATE
|
||||
#define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_USART_40004C00_ZEPHYR_IRQ_PRIO
|
||||
#define PORT_4_IRQ ST_STM32_USART_40004C00_IRQ_0
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_5_BASE_ADDRESS ST_STM32_USART_40005000_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_5_BAUD_RATE ST_STM32_USART_40005000_BAUD_RATE
|
||||
#define CONFIG_UART_STM32_PORT_5_IRQ_PRI ST_STM32_USART_40005000_ZEPHYR_IRQ_PRIO
|
||||
#define PORT_5_IRQ ST_STM32_USART_40005000_IRQ_0
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue