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qspi: stm32: Add support for reset cmd on init

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If the flash is used in 4-byte addressing, reading SFDP will fail after
a system reset if the flash isn't power cycled or hardware reset, since
Zephyr will try to use 3-byte addressing while the flash (still) expects
4-byte addressing.

This commit adds the ability to send a reset command to the flash as part
of initialization, which complements the existing reset-gpio
functionality, and is useful on low-pincount flashes which do not have a
hardware reset.

Signed-off-by: Ole Morten Haaland <omh@icsys.no>
This commit is contained in:
Ole Morten Haaland 2022-09-28 10:53:36 +02:00 • committed by Carles Cufí
commit 667a3f9de9
2 changed files with 40 additions and 0 deletions
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31
drivers/flash/flash_stm32_qspi.c
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@ -30,6 +30,7 @@
#endif
#define STM32_QSPI_RESET_GPIO DT_INST_NODE_HAS_PROP(0, reset_gpios)
#define STM32_QSPI_RESET_CMD DT_INST_NODE_HAS_PROP(0, reset_cmd)
#include <stm32_ll_dma.h>
@ -1054,6 +1055,31 @@ static void flash_stm32_qspi_gpio_reset(const struct device *dev)
}
#endif
#if STM32_QSPI_RESET_CMD
static int flash_stm32_qspi_send_reset(const struct device *dev)
{
QSPI_CommandTypeDef cmd = {
.Instruction = SPI_NOR_CMD_RESET_EN,
.InstructionMode = QSPI_INSTRUCTION_1_LINE,
};
int ret;
ret = qspi_send_cmd(dev, &cmd);
if (ret != 0) {
LOG_ERR("%d: Failed to send RESET_EN", ret);
return ret;
}
cmd.Instruction = SPI_NOR_CMD_RESET_MEM;
ret = qspi_send_cmd(dev, &cmd);
if (ret != 0) {
LOG_ERR("%d: Failed to send RESET_MEM", ret);
return ret;
}
return 0;
}
#endif
static int flash_stm32_qspi_init(const struct device *dev)
{
const struct flash_stm32_qspi_config *dev_cfg = dev->config;
@ -1177,6 +1203,11 @@ static int flash_stm32_qspi_init(const struct device *dev)
/* Run IRQ init */
dev_cfg->irq_config(dev);
#if STM32_QSPI_RESET_CMD
flash_stm32_qspi_send_reset(dev);
k_busy_wait(DT_INST_PROP(0, reset_cmd_wait));
#endif
/* Run NOR init */
const uint8_t decl_nph = 2;
union {