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drivers/fdcan: stm32: use new pinctrl API

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Use the new pinctrl API to configure pins.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2021-11-05 15:52:01 +01:00 • committed by Carles Cufí
commit 65d222b0ab
3 changed files with 12 additions and 21 deletions
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16
drivers/can/can_stm32fd.c
View file

@ -5,11 +5,11 @@
*/
#include <drivers/can.h>
#include <drivers/pinctrl.h>
#include <kernel.h>
#include <soc.h>
#include <stm32_ll_rcc.h>
#include "can_stm32fd.h"
#include <pinmux/pinmux_stm32.h>
#include <logging/log.h>
LOG_MODULE_DECLARE(can_driver, CONFIG_CAN_LOG_LEVEL);
@ -72,9 +72,7 @@ static int can_stm32fd_init(const struct device *dev)
int ret;
/* Configure dt provided device signals when available */
ret = stm32_dt_pinctrl_configure(cfg->pinctrl,
ARRAY_SIZE(cfg->pinctrl),
(uint32_t)mcan_cfg->can);
ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
if (ret < 0) {
LOG_ERR("CAN pinctrl setup failed (%d)", ret);
return ret;
@ -235,6 +233,9 @@ static void config_can_##inst##_irq(void) \
#ifdef CONFIG_CAN_FD_MODE
#define CAN_STM32FD_CFG_INST(inst) \
\
PINCTRL_DT_INST_DEFINE(inst) \
\
static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \
.msg_sram = (struct can_mcan_msg_sram *) \
DT_INST_REG_ADDR_BY_NAME(inst, message_ram), \
@ -258,12 +259,15 @@ static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \
.tx_delay_comp_offset = \
DT_INST_PROP(inst, tx_delay_comp_offset) \
}, \
.pinctrl = ST_STM32_DT_INST_PINCTRL(inst, 0), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
};
#else /* CONFIG_CAN_FD_MODE */
#define CAN_STM32FD_CFG_INST(inst) \
\
PINCTRL_DT_INST_DEFINE(inst) \
\
static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \
.msg_sram = (struct can_mcan_msg_sram *) \
DT_INST_REG_ADDR_BY_NAME(inst, message_ram), \
@ -278,7 +282,7 @@ static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \
DT_INST_PROP_OR(inst, phase_seg1, 0), \
.ts2 = DT_INST_PROP_OR(inst, phase_seg2, 0), \
}, \
.pinctrl = ST_STM32_DT_INST_PINCTRL(inst, 0), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
};
#endif /* CONFIG_CAN_FD_MODE */

4
drivers/can/can_stm32fd.h
View file

@ -9,7 +9,6 @@
#define ZEPHYR_DRIVERS_CAN_STM32FD_H_
#include "can_mcan.h"
#include <pinmux/pinmux_stm32.h>
#define DEV_DATA(dev) ((struct can_stm32fd_data *)(dev)->data)
#define DEV_CFG(dev) ((const struct can_stm32fd_config *)(dev)->config)
@ -18,8 +17,7 @@ struct can_stm32fd_config {
struct can_mcan_msg_sram *msg_sram;
void (*config_irq)(void);
struct can_mcan_config mcan_cfg;
/* CAN always has an RX and TX pin. Hence, hardcode it to two*/
const struct soc_gpio_pinctrl pinctrl[2];
const struct pinctrl_dev_config *pcfg;
};
struct can_stm32fd_data {

13
dts/bindings/can/st,stm32-fdcan.yaml
View file

@ -2,15 +2,4 @@ description: Bosch m_can CAN-FD controller
compatible: "st,stm32-fdcan"
include: bosch,m-can.yaml
properties:
pinctrl-0:
type: phandles
required: false
description: |
GPIO pin configuration for CAN signals (RX, TX). We expect
that the phandles will reference pinctrl nodes.
For example the can1 would be
pinctrl-0 = <&fdcan1_rx_pa11 &fdcan1_tx_pa12>;
include: ["bosch,m-can.yaml", "pinctrl-device.yaml"]