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kinetis: reorganise soc directory using soc family

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Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.

Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2016-04-02 23:35:35 -04:00 • committed by Anas Nashif
commit 65c06afa58
26 changed files with 142 additions and 44 deletions
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71
arch/arm/soc/fsl_frdm_k64f/Kconfig
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@ -1,71 +0,0 @@
# Kconfig - FSL FRDM K64F platform configuration options
#
# Copyright (c) 2014-2016 Wind River Systems, Inc.
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
if SOC_FSL_FRDM_K64F
config K64_CORE_CLOCK_DIVIDER
int
prompt "Freescale K64 core clock divider"
default 1
help
This option specifies the divide value for the K64 processor core clock
from the system clock.
config K64_BUS_CLOCK_DIVIDER
int
prompt "Freescale K64 bus clock divider"
default 2
help
This option specifies the divide value for the K64 bus clock from the
system clock.
config K64_FLEXBUS_CLOCK_DIVIDER
int
prompt "Freescale K64 FlexBus clock divider"
default 3
help
This option specifies the divide value for the K64 FlexBus clock from the
system clock.
config K64_FLASH_CLOCK_DIVIDER
int
prompt "Freescale K64 flash clock divider"
default 5
help
This option specifies the divide value for the K64 flash clock from the
system clock.
config WDOG_INIT
def_bool y
# omit prompt to signify a "hidden" option
help
This processor enables the watchdog timer with a short timeout
upon reset. Therefore, this requires that the watchdog be configured
during reset handling.
config PRESERVE_JTAG_IO_PINS
bool "Freescale FRDM-K64F JTAG pin usage"
depends on PINMUX
default y
help
The FRDM-K64F board routes the PTA0/1/2 pins as JTAG/SWD signals that
are used for the OpenSDAv2 debug interface. These pins are also routed to
the Arduino header as D8, D3 and D5, respectively.
Enable this option to preserve these pins for the debug interface.
endif # SOC_FSL_FRDM_K64F