diff --git a/arch/arm/soc/nordic_nrf/nrf52/dts.fixup b/arch/arm/soc/nordic_nrf/nrf52/dts.fixup
index 27724973142..b51a6194fd3 100644
--- a/arch/arm/soc/nordic_nrf/nrf52/dts.fixup
+++ b/arch/arm/soc/nordic_nrf/nrf52/dts.fixup
@@ -57,4 +57,20 @@
 #define CONFIG_WDT_NRF_IRQ		NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT
 #define CONFIG_WDT_NRF_IRQ_PRI		NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT_PRIORITY
 
+#define CONFIG_WNCM14A2A_UART_DRV_NAME			NORDIC_NRF_UARTE_40028000_WNCM14A2A_BUS_NAME
+#define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME	NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER
+#define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN	NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN
+#define CONFIG_WNCM14A2A_GPIO_MDM_POWER_NAME		NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER
+#define CONFIG_WNCM14A2A_GPIO_MDM_POWER_PIN		NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_POWER_GPIOS_PIN
+#define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME	NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER
+#define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN	NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN
+#define CONFIG_WNCM14A2A_GPIO_MDM_RESET_NAME		NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER
+#define CONFIG_WNCM14A2A_GPIO_MDM_RESET_PIN		NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_RESET_GPIOS_PIN
+#define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME	NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER
+#define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN	NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN
+#ifdef NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
+#define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_NAME		NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER
+#define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_PIN		NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
+#endif
+
 /* End of SoC Level DTS fixup file */
diff --git a/boards/arm/nrf52840_pca10056/Kconfig.defconfig b/boards/arm/nrf52840_pca10056/Kconfig.defconfig
index 81e063182e1..e29719b42ad 100644
--- a/boards/arm/nrf52840_pca10056/Kconfig.defconfig
+++ b/boards/arm/nrf52840_pca10056/Kconfig.defconfig
@@ -30,6 +30,22 @@ config UART_0_NRF_RTS_PIN
 config UART_0_NRF_CTS_PIN
 	default 7
 
+if MODEM_WNCM14A2A
+
+config UART_1_NRF_TX_PIN
+	default 46
+
+config UART_1_NRF_RX_PIN
+	default 45
+
+config UART_1_NRF_RTS_PIN
+	default 44
+
+config UART_1_NRF_CTS_PIN
+	default 47
+
+endif # MODEM_WCN14A2A
+
 endif # UART_NRFX
 
 if USB
diff --git a/boards/arm/nrf52840_pca10056/nrf52840_pca10056.dts b/boards/arm/nrf52840_pca10056/nrf52840_pca10056.dts
index c581d97a8ff..cf76b7aedaf 100644
--- a/boards/arm/nrf52840_pca10056/nrf52840_pca10056.dts
+++ b/boards/arm/nrf52840_pca10056/nrf52840_pca10056.dts
@@ -40,6 +40,26 @@
 	status = "ok";
 };
 
+#ifdef CONFIG_UART_1_NRF_UARTE
+&uart1 {
+	current-speed = <115200>;
+	status = "ok";
+
+#ifdef CONFIG_MODEM_WNCM14A2A
+	wncm14a2a {
+		compatible = "wnc,m14a2a";
+		label = "wncm14a2a";
+		mdm-boot-mode-sel-gpios = <&gpio1 2 0>;
+		mdm-power-gpios = <&gpio1 3 0>;
+		mdm-keep-awake-gpios = <&gpio1 7 0>;
+		mdm-reset-gpios = <&gpio1 10 0>;
+		mdm-shld-trans-ena-gpios = <&gpio1 11 0>;
+		status = "ok";
+	};
+#endif
+};
+#endif
+
 &i2c0 {
 	status = "ok";
 	sda-pin = <26>;
diff --git a/drivers/modem/Kconfig b/drivers/modem/Kconfig
index 61c0734c59a..7b94e41a3a7 100644
--- a/drivers/modem/Kconfig
+++ b/drivers/modem/Kconfig
@@ -45,6 +45,9 @@ config MODEM_WNCM14A2A
 	select MODEM_RECEIVER
 	select NET_OFFLOAD
 	select UART_MCUX_2 if BOARD_FRDM_K64F
+	select GPIO_NRF5_P1 if SOC_NRF52840
+	select UART_1_NRF_UARTE if SOC_NRF52840
+	select UART_1_NRF_FLOW_CONTROL if SOC_NRF52840
 	help
 	  Choose this setting to enable Wistron WNC-M14A2A LTE-M modem driver.
 	  NOTE: Currently the pin settings only work with FRDM K64F shield.