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pcie: controller: rename xlate to translate

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As suggested by Tomasz Bursztyka, translate is clearer than xlate in
the PCIe controller functions and callbacks names.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This commit is contained in:
Neil Armstrong 2022-01-19 10:34:20 +01:00 • committed by Anas Nashif
commit 6595ca1a35
4 changed files with 19 additions and 19 deletions
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4
drivers/pcie/host/controller.c
View file

@ -133,8 +133,8 @@ static void generic_pcie_ctrl_type0_enumerate_bars(const struct device *ctrl_dev
found_mem64, bar_size, &bar_bus_addr)) { found_mem64, bar_size, &bar_bus_addr)) {
uintptr_t bar_phys_addr; uintptr_t bar_phys_addr;
pcie_ctrl_region_xlate(ctrl_dev, bdf, found_mem, pcie_ctrl_region_translate(ctrl_dev, bdf, found_mem,
found_mem64, bar_bus_addr, &bar_phys_addr); found_mem64, bar_bus_addr, &bar_phys_addr);
LOG_INF("[%02x:%02x.%x] BAR%d size 0x%lx " LOG_INF("[%02x:%02x.%x] BAR%d size 0x%lx "
"assigned [%s 0x%lx-0x%lx -> 0x%lx-0x%lx]", "assigned [%s 0x%lx-0x%lx -> 0x%lx-0x%lx]",

12
drivers/pcie/host/pcie.c
View file

@ -178,12 +178,12 @@ bool pcie_get_mbar(pcie_bdf_t bdf,
#ifdef CONFIG_PCIE_CONTROLLER #ifdef CONFIG_PCIE_CONTROLLER
/* Translate to physical memory address from bus address */ /* Translate to physical memory address from bus address */
if (!pcie_ctrl_region_xlate(dev, bdf, PCIE_CONF_BAR_MEM(phys_addr), if (!pcie_ctrl_region_translate(dev, bdf, PCIE_CONF_BAR_MEM(phys_addr),
PCIE_CONF_BAR_64(phys_addr), PCIE_CONF_BAR_64(phys_addr),
PCIE_CONF_BAR_MEM(phys_addr) ? PCIE_CONF_BAR_MEM(phys_addr) ?
PCIE_CONF_BAR_IO_ADDR(phys_addr) PCIE_CONF_BAR_IO_ADDR(phys_addr)
: PCIE_CONF_BAR_ADDR(phys_addr), : PCIE_CONF_BAR_ADDR(phys_addr),
&mbar->phys_addr)) { &mbar->phys_addr)) {
return false; return false;
} }
#else #else

8
drivers/pcie/host/pcie_ecam.c
View file

@ -240,9 +240,9 @@ static bool pcie_ecam_region_allocate(const struct device *dev, pcie_bdf_t bdf,
return pcie_ecam_region_allocate_type(data, bdf, bar_size, bar_bus_addr, type); return pcie_ecam_region_allocate_type(data, bdf, bar_size, bar_bus_addr, type);
} }
static bool pcie_ecam_region_xlate(const struct device *dev, pcie_bdf_t bdf, static bool pcie_ecam_region_translate(const struct device *dev, pcie_bdf_t bdf,
bool mem, bool mem64, uintptr_t bar_bus_addr, bool mem, bool mem64, uintptr_t bar_bus_addr,
uintptr_t *bar_addr) uintptr_t *bar_addr)
{ {
struct pcie_ecam_data *data = (struct pcie_ecam_data *)dev->data; struct pcie_ecam_data *data = (struct pcie_ecam_data *)dev->data;
enum pcie_region_type type; enum pcie_region_type type;
@ -270,7 +270,7 @@ static const struct pcie_ctrl_driver_api pcie_ecam_api = {
.conf_read = pcie_ecam_ctrl_conf_read, .conf_read = pcie_ecam_ctrl_conf_read,
.conf_write = pcie_ecam_ctrl_conf_write, .conf_write = pcie_ecam_ctrl_conf_write,
.region_allocate = pcie_ecam_region_allocate, .region_allocate = pcie_ecam_region_allocate,
.region_xlate = pcie_ecam_region_xlate, .region_translate = pcie_ecam_region_translate,
}; };
#define PCIE_ECAM_INIT(n) \ #define PCIE_ECAM_INIT(n) \

14
include/drivers/pcie/controller.h
View file

@ -94,9 +94,9 @@ typedef bool (*pcie_ctrl_region_allocate_t)(const struct device *dev, pcie_bdf_t
* @param bar_addr CPU-centric address translated from the bus-centric address * @param bar_addr CPU-centric address translated from the bus-centric address
* @return True if translation was possible, False if translation failed * @return True if translation was possible, False if translation failed
*/ */
typedef bool (*pcie_ctrl_region_xlate_t)(const struct device *dev, pcie_bdf_t bdf, typedef bool (*pcie_ctrl_region_translate_t)(const struct device *dev, pcie_bdf_t bdf,
bool mem, bool mem64, uintptr_t bar_bus_addr, bool mem, bool mem64, uintptr_t bar_bus_addr,
uintptr_t *bar_addr); uintptr_t *bar_addr);
/** /**
* @brief Read a 32-bit word from a Memory-Mapped endpoint's configuration space. * @brief Read a 32-bit word from a Memory-Mapped endpoint's configuration space.
@ -147,7 +147,7 @@ __subsystem struct pcie_ctrl_driver_api {
pcie_ctrl_conf_read_t conf_read; pcie_ctrl_conf_read_t conf_read;
pcie_ctrl_conf_write_t conf_write; pcie_ctrl_conf_write_t conf_write;
pcie_ctrl_region_allocate_t region_allocate; pcie_ctrl_region_allocate_t region_allocate;
pcie_ctrl_region_xlate_t region_xlate; pcie_ctrl_region_translate_t region_translate;
}; };
/** /**
@ -235,18 +235,18 @@ static inline bool pcie_ctrl_region_allocate(const struct device *dev, pcie_bdf_
* @param bar_addr CPU-centric address translated from the bus-centric address * @param bar_addr CPU-centric address translated from the bus-centric address
* @return True if translation was possible, False if translation failed * @return True if translation was possible, False if translation failed
*/ */
static inline bool pcie_ctrl_region_xlate(const struct device *dev, pcie_bdf_t bdf, static inline bool pcie_ctrl_region_translate(const struct device *dev, pcie_bdf_t bdf,
bool mem, bool mem64, uintptr_t bar_bus_addr, bool mem, bool mem64, uintptr_t bar_bus_addr,
uintptr_t *bar_addr) uintptr_t *bar_addr)
{ {
const struct pcie_ctrl_driver_api *api = const struct pcie_ctrl_driver_api *api =
(const struct pcie_ctrl_driver_api *)dev->api; (const struct pcie_ctrl_driver_api *)dev->api;
if (!api->region_xlate) { if (!api->region_translate) {
*bar_addr = bar_bus_addr; *bar_addr = bar_bus_addr;
return true; return true;
} else { } else {
return api->region_xlate(dev, bdf, mem, mem64, bar_bus_addr, bar_addr); return api->region_translate(dev, bdf, mem, mem64, bar_bus_addr, bar_addr);
} }
} }