dts: arm: nxp: nxp_imx8m_m4: Add ECSPI devices
Add device tree instances for ECSPI devices, update SoC code to enable clocks. Signed-off-by: Peter Fecher <p.fecher@phytec.de>
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2 changed files with 53 additions and 0 deletions
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@ -128,6 +128,29 @@ static void SOC_ClockInit(void)
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/* Set root clock to 80MHZ/ 1= 80MHZ */
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CLOCK_SetRootDivider(kCLOCK_RootUart4, 1U, 1U);
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#endif
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#endif
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#if defined(CONFIG_SPI_MCUX_ECSPI)
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(ecspi1), okay)
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/* Set ECSPI1 source to SYSTEM PLL1 800MHZ */
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CLOCK_SetRootMux(kCLOCK_RootEcspi1, kCLOCK_EcspiRootmuxSysPll1);
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/* Set root clock to 800MHZ / 10 = 80MHZ */
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CLOCK_SetRootDivider(kCLOCK_RootEcspi1, 2U, 5U);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(ecspi2), okay)
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/* Set ECSPI2 source to SYSTEM PLL1 800MHZ */
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CLOCK_SetRootMux(kCLOCK_RootEcspi2, kCLOCK_EcspiRootmuxSysPll1);
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/* Set root clock to 800MHZ / 10 = 80MHZ */
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CLOCK_SetRootDivider(kCLOCK_RootEcspi2, 2U, 5U);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(ecspi3), okay)
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/* Set ECSPI3 source to SYSTEM PLL1 800MHZ */
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CLOCK_SetRootMux(kCLOCK_RootEcspi3, kCLOCK_EcspiRootmuxSysPll1);
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/* Set root clock to 800MHZ / 10 = 80MHZ */
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CLOCK_SetRootDivider(kCLOCK_RootEcspi3, 2U, 5U);
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#endif
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#endif
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/* Enable RDC clock */
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