gpio: Add QMSI-based implementation

Introduce the GPIO QMSI-based implementation. This is basically a
shim layer that implement's Zephyr's GPIO APIs on top of QMSI drivers.

This is an alternative driver that conflicts with the previous
GPIO_DW implementation. In order to enable it you must set:
- CONFIG_GPIO=n
- CONFIG_GPIO_QMSI=y
- CONFIG_GPIO_0=y
- CONFIG_QMSI_DRIVERS=y
- CONFIG_QMSI_INTALL_PATH="PATH_TO_QMSI"

Note that this driver currently only supports one controller instance,
GPIO_0. It is implemented this way due to a limitation from the current
version of QMSI. QMSI versions later than 1.0 doesn't have this
limitation.

Missing:
- support multiple controller instances (gpio_0, gpio_1, etc);
- enable level triggered interrupts in sync with system clock,
through setting INT_CLOCK_SYNC properly.

Change-Id: Ib61b153dae9741806a9a31d7dc1f82b96d000fbe
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>

arch/x86/soc/quark_se/Kconfig

@@ -82,6 +82,7 @@ if GPIO
 config GPIO_DW
 	def_bool y
 
+if GPIO_DW
 config GPIO_DW_BOTHEDGES_SUPPORT
 	def_bool y
 config GPIO_DW_CLOCK_GATE
@@ -111,6 +112,22 @@ config GPIO_DW_1_BITS
 	default 6
 endif
 
+if QMSI_DRIVERS
+config GPIO_QMSI
+	def_bool n
+if GPIO_QMSI
+config GPIO_QMSI_0
+	def_bool n
+config GPIO_QMSI_0_NAME
+	default "gpio_0"
+config GPIO_QMSI_0_IRQ
+	default 8
+config GPIO_QMSI_0_PRI
+	default 2
+endif
+endif
+endif
+
 if I2C
 config I2C_DW
 	def_bool y