diff --git a/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts b/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts index a94318986a9..71206f6a1ce 100644 --- a/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts +++ b/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts @@ -61,26 +61,44 @@ &i2c0 { status = "okay"; clock-frequency = ; + pinctrl-0 = <&i2c0_clk_gpb3_default + &i2c0_data_gpb4_default>; + pinctrl-names = "default"; }; &i2c1 { status = "okay"; clock-frequency = ; + pinctrl-0 = <&i2c1_clk_gpc1_default + &i2c1_data_gpc2_default>; + pinctrl-names = "default"; }; &i2c2 { status = "okay"; clock-frequency = ; + pinctrl-0 = <&i2c2_clk_gpf6_default + &i2c2_data_gpf7_default>; + pinctrl-names = "default"; }; &i2c3 { status = "okay"; clock-frequency = ; + pinctrl-0 = <&i2c3_clk_gph1_default + &i2c3_data_gph2_default>; + pinctrl-names = "default"; }; &i2c4 { status = "okay"; clock-frequency = ; + pinctrl-0 = <&i2c4_clk_gpe0_default + &i2c4_data_gpe7_default>; + pinctrl-names = "default"; }; &i2c5 { status = "okay"; clock-frequency = ; + pinctrl-0 = <&i2c5_clk_gpa4_default + &i2c5_data_gpa5_default>; + pinctrl-names = "default"; }; &uart1 { status = "okay"; diff --git a/drivers/i2c/i2c_ite_enhance.c b/drivers/i2c/i2c_ite_enhance.c index c510f671bd9..a6445bac09c 100644 --- a/drivers/i2c/i2c_ite_enhance.c +++ b/drivers/i2c/i2c_ite_enhance.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include #include @@ -26,30 +26,18 @@ LOG_MODULE_REGISTER(i2c_ite_enhance, CONFIG_I2C_LOG_LEVEL); #define I2C_LINE_SDA_HIGH BIT(1) #define I2C_LINE_IDLE (I2C_LINE_SCL_HIGH | I2C_LINE_SDA_HIGH) -/* - * Structure i2c_alts_cfg is about the alternate function - * setting of i2c, this config will be used at initial - * time and recover bus. - */ -struct i2c_alts_cfg { - /* Pinmux control group */ - const struct device *pinctrls; - /* GPIO pin */ - uint8_t pin; - /* Alternate function */ - uint8_t alt_fun; -}; - struct i2c_enhance_config { void (*irq_config_func)(void); uint32_t bitrate; uint8_t *base; uint8_t i2c_irq_base; uint8_t port; + /* SCL GPIO cells */ + struct gpio_dt_spec scl_gpios; + /* SDA GPIO cells */ + struct gpio_dt_spec sda_gpios; /* I2C alternate configuration */ - const struct i2c_alts_cfg *alts_list; - /* GPIO handle */ - const struct device *gpio_dev; + const struct pinctrl_dev_config *pcfg; uint8_t prescale_scl_low; uint32_t clock_gate_offset; }; @@ -598,7 +586,7 @@ static int i2c_enhance_init(const struct device *dev) const struct i2c_enhance_config *config = dev->config; uint8_t *base = config->base; uint32_t bitrate_cfg; - int error; + int error, status; /* Initialize mutex and semaphore */ k_mutex_init(&data->mutex); @@ -637,14 +625,13 @@ static int i2c_enhance_init(const struct device *dev) return error; } - /* The pin is set to I2C alternate function of SCL */ - pinmux_pin_set(config->alts_list[SCL].pinctrls, - config->alts_list[SCL].pin, - config->alts_list[SCL].alt_fun); - /* The pin is set to I2C alternate function of SDA */ - pinmux_pin_set(config->alts_list[SDA].pinctrls, - config->alts_list[SDA].pin, - config->alts_list[SDA].alt_fun); + /* Set the pin to I2C alternate function. */ + status = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); + if (status < 0) { + LOG_ERR("Failed to configure I2C pins"); + return status; + } + return 0; } @@ -652,16 +639,12 @@ static int i2c_enhance_init(const struct device *dev) static int i2c_enhance_recover_bus(const struct device *dev) { const struct i2c_enhance_config *config = dev->config; - int i; + int i, status; /* Set SCL of I2C as GPIO pin */ - pinmux_pin_input_enable(config->alts_list[SCL].pinctrls, - config->alts_list[SCL].pin, - PINMUX_OUTPUT_ENABLED); + gpio_pin_configure_dt(&config->scl_gpios, GPIO_OUTPUT); /* Set SDA of I2C as GPIO pin */ - pinmux_pin_input_enable(config->alts_list[SDA].pinctrls, - config->alts_list[SDA].pin, - PINMUX_OUTPUT_ENABLED); + gpio_pin_configure_dt(&config->sda_gpios, GPIO_OUTPUT); /* * In I2C recovery bus, 1ms sleep interval for bitbanging i2c @@ -669,45 +652,43 @@ static int i2c_enhance_recover_bus(const struct device *dev) * low to high or high to low. */ /* Pull SCL and SDA pin to high */ - gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 1); - gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 1); + gpio_pin_set_dt(&config->scl_gpios, 1); + gpio_pin_set_dt(&config->sda_gpios, 1); k_msleep(1); /* Start condition */ - gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 0); + gpio_pin_set_dt(&config->sda_gpios, 0); k_msleep(1); - gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 0); + gpio_pin_set_dt(&config->scl_gpios, 0); k_msleep(1); /* 9 cycles of SCL with SDA held high */ for (i = 0; i < 9; i++) { /* SDA */ - gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 1); + gpio_pin_set_dt(&config->sda_gpios, 1); /* SCL */ - gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 1); + gpio_pin_set_dt(&config->scl_gpios, 1); k_msleep(1); /* SCL */ - gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 0); + gpio_pin_set_dt(&config->scl_gpios, 0); k_msleep(1); } /* SDA */ - gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 0); + gpio_pin_set_dt(&config->sda_gpios, 0); k_msleep(1); /* Stop condition */ - gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 1); + gpio_pin_set_dt(&config->scl_gpios, 1); k_msleep(1); - gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 1); + gpio_pin_set_dt(&config->sda_gpios, 1); k_msleep(1); - /* Set GPIO back to I2C alternate function of SCL */ - pinmux_pin_set(config->alts_list[SCL].pinctrls, - config->alts_list[SCL].pin, - config->alts_list[SCL].alt_fun); - /* Set GPIO back to I2C alternate function of SDA */ - pinmux_pin_set(config->alts_list[SDA].pinctrls, - config->alts_list[SDA].pin, - config->alts_list[SDA].alt_fun); + /* Set GPIO back to I2C alternate function */ + status = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); + if (status < 0) { + LOG_ERR("Failed to configure I2C pins"); + return status; + } /* reset i2c port */ i2c_reset(dev); @@ -725,6 +706,7 @@ static const struct i2c_driver_api i2c_enhance_driver_api = { }; #define I2C_ITE_ENHANCE_INIT(inst) \ + PINCTRL_DT_INST_DEFINE(inst); \ BUILD_ASSERT((DT_INST_PROP(inst, clock_frequency) == \ 50000) || \ (DT_INST_PROP(inst, clock_frequency) == \ @@ -734,9 +716,6 @@ static const struct i2c_driver_api i2c_enhance_driver_api = { (DT_INST_PROP(inst, clock_frequency) == \ I2C_BITRATE_FAST_PLUS), "Not support I2C bit rate value"); \ static void i2c_enhance_config_func_##inst(void); \ - static const struct i2c_alts_cfg \ - i2c_alts_##inst[DT_INST_NUM_PINCTRLS_BY_IDX(inst, 0)] = \ - IT8XXX2_DT_ALT_ITEMS_LIST(inst); \ \ static const struct i2c_enhance_config i2c_enhance_cfg_##inst = { \ .base = (uint8_t *)(DT_INST_REG_ADDR(inst)), \ @@ -744,10 +723,11 @@ static const struct i2c_driver_api i2c_enhance_driver_api = { .bitrate = DT_INST_PROP(inst, clock_frequency), \ .i2c_irq_base = DT_INST_IRQN(inst), \ .port = DT_INST_PROP(inst, port_num), \ - .alts_list = i2c_alts_##inst, \ - .gpio_dev = DEVICE_DT_GET(DT_INST_PHANDLE(inst, gpio_dev)), \ + .scl_gpios = GPIO_DT_SPEC_INST_GET(inst, scl_gpios), \ + .sda_gpios = GPIO_DT_SPEC_INST_GET(inst, sda_gpios), \ .prescale_scl_low = DT_INST_PROP_OR(inst, prescale_scl_low, 0), \ .clock_gate_offset = DT_INST_PROP(inst, clock_gate_offset), \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ }; \ \ static struct i2c_enhance_data i2c_enhance_data_##inst; \ diff --git a/drivers/i2c/i2c_ite_it8xxx2.c b/drivers/i2c/i2c_ite_it8xxx2.c index 453d10f2cc4..bafbfd78ff5 100644 --- a/drivers/i2c/i2c_ite_it8xxx2.c +++ b/drivers/i2c/i2c_ite_it8xxx2.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include #include @@ -26,30 +26,18 @@ LOG_MODULE_REGISTER(i2c_ite_it8xxx2, CONFIG_I2C_LOG_LEVEL); #define I2C_LINE_SDA_HIGH BIT(1) #define I2C_LINE_IDLE (I2C_LINE_SCL_HIGH | I2C_LINE_SDA_HIGH) -/* - * Structure i2c_alts_cfg is about the alternate function - * setting of i2c, this config will be used at initial - * time and recover bus. - */ -struct i2c_alts_cfg { - /* Pinmux control group */ - const struct device *pinctrls; - /* GPIO pin */ - uint8_t pin; - /* Alternate function */ - uint8_t alt_fun; -}; - struct i2c_it8xxx2_config { void (*irq_config_func)(void); uint32_t bitrate; uint8_t *base; uint8_t i2c_irq_base; uint8_t port; + /* SCL GPIO cells */ + struct gpio_dt_spec scl_gpios; + /* SDA GPIO cells */ + struct gpio_dt_spec sda_gpios; /* I2C alternate configuration */ - const struct i2c_alts_cfg *alts_list; - /* GPIO handle */ - const struct device *gpio_dev; + const struct pinctrl_dev_config *pcfg; uint32_t clock_gate_offset; }; @@ -608,7 +596,7 @@ static int i2c_it8xxx2_init(const struct device *dev) const struct i2c_it8xxx2_config *config = dev->config; uint8_t *base = config->base; uint32_t bitrate_cfg; - int error; + int error, status; /* * This register is a pre-define hardware slave A and can @@ -666,14 +654,12 @@ static int i2c_it8xxx2_init(const struct device *dev) return error; } - /* The pin is set to I2C alternate function of SCL */ - pinmux_pin_set(config->alts_list[SCL].pinctrls, - config->alts_list[SCL].pin, - config->alts_list[SCL].alt_fun); - /* The pin is set to I2C alternate function of SDA */ - pinmux_pin_set(config->alts_list[SDA].pinctrls, - config->alts_list[SDA].pin, - config->alts_list[SDA].alt_fun); + /* Set the pin to I2C alternate function. */ + status = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); + if (status < 0) { + LOG_ERR("Failed to configure I2C pins"); + return status; + } return 0; } @@ -681,16 +667,12 @@ static int i2c_it8xxx2_init(const struct device *dev) static int i2c_it8xxx2_recover_bus(const struct device *dev) { const struct i2c_it8xxx2_config *config = dev->config; - int i; + int i, status; /* Set SCL of I2C as GPIO pin */ - pinmux_pin_input_enable(config->alts_list[SCL].pinctrls, - config->alts_list[SCL].pin, - PINMUX_OUTPUT_ENABLED); + gpio_pin_configure_dt(&config->scl_gpios, GPIO_OUTPUT); /* Set SDA of I2C as GPIO pin */ - pinmux_pin_input_enable(config->alts_list[SDA].pinctrls, - config->alts_list[SDA].pin, - PINMUX_OUTPUT_ENABLED); + gpio_pin_configure_dt(&config->sda_gpios, GPIO_OUTPUT); /* * In I2C recovery bus, 1ms sleep interval for bitbanging i2c @@ -698,45 +680,43 @@ static int i2c_it8xxx2_recover_bus(const struct device *dev) * low to high or high to low. */ /* Pull SCL and SDA pin to high */ - gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 1); - gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 1); + gpio_pin_set_dt(&config->scl_gpios, 1); + gpio_pin_set_dt(&config->sda_gpios, 1); k_msleep(1); /* Start condition */ - gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 0); + gpio_pin_set_dt(&config->sda_gpios, 0); k_msleep(1); - gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 0); + gpio_pin_set_dt(&config->scl_gpios, 0); k_msleep(1); /* 9 cycles of SCL with SDA held high */ for (i = 0; i < 9; i++) { /* SDA */ - gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 1); + gpio_pin_set_dt(&config->sda_gpios, 1); /* SCL */ - gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 1); + gpio_pin_set_dt(&config->scl_gpios, 1); k_msleep(1); /* SCL */ - gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 0); + gpio_pin_set_dt(&config->scl_gpios, 0); k_msleep(1); } /* SDA */ - gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 0); + gpio_pin_set_dt(&config->sda_gpios, 0); k_msleep(1); /* Stop condition */ - gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 1); + gpio_pin_set_dt(&config->scl_gpios, 1); k_msleep(1); - gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 1); + gpio_pin_set_dt(&config->sda_gpios, 1); k_msleep(1); /* Set GPIO back to I2C alternate function of SCL */ - pinmux_pin_set(config->alts_list[SCL].pinctrls, - config->alts_list[SCL].pin, - config->alts_list[SCL].alt_fun); - /* Set GPIO back to I2C alternate function of SDA */ - pinmux_pin_set(config->alts_list[SDA].pinctrls, - config->alts_list[SDA].pin, - config->alts_list[SDA].alt_fun); + status = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); + if (status < 0) { + LOG_ERR("Failed to configure I2C pins"); + return status; + } /* reset i2c port */ i2c_reset(dev); @@ -754,6 +734,7 @@ static const struct i2c_driver_api i2c_it8xxx2_driver_api = { }; #define I2C_ITE_IT8XXX2_INIT(inst) \ + PINCTRL_DT_INST_DEFINE(inst); \ BUILD_ASSERT((DT_INST_PROP(inst, clock_frequency) == \ 50000) || \ (DT_INST_PROP(inst, clock_frequency) == \ @@ -763,9 +744,6 @@ static const struct i2c_driver_api i2c_it8xxx2_driver_api = { (DT_INST_PROP(inst, clock_frequency) == \ I2C_BITRATE_FAST_PLUS), "Not support I2C bit rate value"); \ static void i2c_it8xxx2_config_func_##inst(void); \ - static const struct i2c_alts_cfg \ - i2c_alts_##inst[DT_INST_NUM_PINCTRLS_BY_IDX(inst, 0)] = \ - IT8XXX2_DT_ALT_ITEMS_LIST(inst); \ \ static const struct i2c_it8xxx2_config i2c_it8xxx2_cfg_##inst = { \ .base = (uint8_t *)(DT_INST_REG_ADDR(inst)), \ @@ -773,9 +751,10 @@ static const struct i2c_driver_api i2c_it8xxx2_driver_api = { .bitrate = DT_INST_PROP(inst, clock_frequency), \ .i2c_irq_base = DT_INST_IRQN(inst), \ .port = DT_INST_PROP(inst, port_num), \ - .alts_list = i2c_alts_##inst, \ - .gpio_dev = DEVICE_DT_GET(DT_INST_PHANDLE(inst, gpio_dev)), \ + .scl_gpios = GPIO_DT_SPEC_INST_GET(inst, scl_gpios), \ + .sda_gpios = GPIO_DT_SPEC_INST_GET(inst, sda_gpios), \ .clock_gate_offset = DT_INST_PROP(inst, clock_gate_offset), \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ }; \ \ static struct i2c_it8xxx2_data i2c_it8xxx2_data_##inst; \ diff --git a/dts/bindings/i2c/ite,common-i2c.yaml b/dts/bindings/i2c/ite,common-i2c.yaml index a876a7c9a75..bea6ee2faac 100644 --- a/dts/bindings/i2c/ite,common-i2c.yaml +++ b/dts/bindings/i2c/ite,common-i2c.yaml @@ -3,7 +3,7 @@ description: Common fields for ITE it8xxx2 I2C -include: i2c-controller.yaml +include: [i2c-controller.yaml, pinctrl-device.yaml] properties: reg: @@ -17,18 +17,17 @@ properties: required: true description: Ordinal identifying the port - gpio-dev: - type: phandle - required: true - description: Get the handle of the GPIO device - - pinctrl-0: - type: phandles + scl-gpios: + type: phandle-array required: true description: | - Configuration of I2C SCL and SDA pinmux controller. - The SCL pin must be specified first and the SDA pin - second in the pinctrl-0 array. + The SCL pin for the selected port. + + sda-gpios: + type: phandle-array + required: true + description: | + The SDA pin for the selected port. clock-gate-offset: type: int @@ -36,3 +35,9 @@ properties: description: | The clock gate offsets combine the register offset from ECPM_BASE and the mask within that register into one value. + + pinctrl-0: + required: true + + pinctrl-names: + required: true diff --git a/dts/riscv/it8xxx2-alts-map.dtsi b/dts/riscv/it8xxx2-alts-map.dtsi index 9a0d793a5c3..fb3ee73a85f 100644 --- a/dts/riscv/it8xxx2-alts-map.dtsi +++ b/dts/riscv/it8xxx2-alts-map.dtsi @@ -50,50 +50,6 @@ pinctrls = <&pinmuxj 3 IT8XXX2_PINMUX_FUNC_3>; }; - /* I2C alternate function */ - pinctrl_i2c_clk0: i2c_clk0 { - pinctrls = <&pinmuxb 3 IT8XXX2_PINMUX_FUNC_1>; - }; - pinctrl_i2c_data0: i2c_data0 { - pinctrls = <&pinmuxb 4 IT8XXX2_PINMUX_FUNC_1>; - }; - pinctrl_i2c_clk1: i2c_clk1 { - pinctrls = <&pinmuxc 1 IT8XXX2_PINMUX_FUNC_1>; - }; - pinctrl_i2c_data1: i2c_data1 { - pinctrls = <&pinmuxc 2 IT8XXX2_PINMUX_FUNC_1>; - }; - pinctrl_i2c_clk2: i2c_clk2 { - pinctrls = <&pinmuxf 6 IT8XXX2_PINMUX_FUNC_1>; - }; - pinctrl_i2c_data2: i2c_data2 { - pinctrls = <&pinmuxf 7 IT8XXX2_PINMUX_FUNC_1>; - }; - pinctrl_i2c_clk3_gph1: i2c_clk3_gph1 { - pinctrls = <&pinmuxh 1 IT8XXX2_PINMUX_FUNC_3>; - }; - pinctrl_i2c_data3_gph2: i2c_data3_gph2 { - pinctrls = <&pinmuxh 2 IT8XXX2_PINMUX_FUNC_3>; - }; - pinctrl_i2c_clk3_gpf2: i2c_clk3_gpf2 { - pinctrls = <&pinmuxf 2 IT8XXX2_PINMUX_FUNC_4>; - }; - pinctrl_i2c_data3_gpf3: i2c_data3_gpf3 { - pinctrls = <&pinmuxf 3 IT8XXX2_PINMUX_FUNC_4>; - }; - pinctrl_i2c_clk4: i2c_clk4 { - pinctrls = <&pinmuxe 0 IT8XXX2_PINMUX_FUNC_3>; - }; - pinctrl_i2c_data4: i2c_data4 { - pinctrls = <&pinmuxe 7 IT8XXX2_PINMUX_FUNC_3>; - }; - pinctrl_i2c_clk5: i2c_clk5 { - pinctrls = <&pinmuxa 4 IT8XXX2_PINMUX_FUNC_3>; - }; - pinctrl_i2c_data5: i2c_data5 { - pinctrls = <&pinmuxa 5 IT8XXX2_PINMUX_FUNC_3>; - }; - /* SHI alternate function */ pinctrl_shi_mosi: shi_mosi { pinctrls = <&pinmuxm 0 IT8XXX2_PINMUX_FUNC_1>; diff --git a/dts/riscv/it8xxx2.dtsi b/dts/riscv/it8xxx2.dtsi index 7c24571ec26..444deeec1f1 100644 --- a/dts/riscv/it8xxx2.dtsi +++ b/dts/riscv/it8xxx2.dtsi @@ -1176,10 +1176,9 @@ status = "disabled"; label = "I2C_0"; port-num = <0>; - gpio-dev = <&gpiob>; + scl-gpios = <&gpiob 3 0>; + sda-gpios = <&gpiob 4 0>; clock-gate-offset = ; - pinctrl-0 = <&pinctrl_i2c_clk0 /* GPB3 */ - &pinctrl_i2c_data0>; /* GPB4 */ }; i2c1: i2c@f01c80 { @@ -1192,10 +1191,9 @@ status = "disabled"; label = "I2C_1"; port-num = <1>; - gpio-dev = <&gpioc>; + scl-gpios = <&gpioc 1 0>; + sda-gpios = <&gpioc 2 0>; clock-gate-offset = ; - pinctrl-0 = <&pinctrl_i2c_clk1 /* GPC1 */ - &pinctrl_i2c_data1>; /* GPC2 */ }; i2c2: i2c@f01cc0 { @@ -1208,10 +1206,9 @@ status = "disabled"; label = "I2C_2"; port-num = <2>; - gpio-dev = <&gpiof>; + scl-gpios = <&gpiof 6 0>; + sda-gpios = <&gpiof 7 0>; clock-gate-offset = ; - pinctrl-0 = <&pinctrl_i2c_clk2 /* GPF6 */ - &pinctrl_i2c_data2>; /* GPF7 */ }; i2c3: i2c@f03680 { @@ -1224,10 +1221,9 @@ status = "disabled"; label = "I2C_3"; port-num = <3>; - gpio-dev = <&gpioh>; + scl-gpios = <&gpioh 1 0>; + sda-gpios = <&gpioh 2 0>; clock-gate-offset = ; - pinctrl-0 = <&pinctrl_i2c_clk3_gph1 /* GPH1 */ - &pinctrl_i2c_data3_gph2>; /* GPH2 */ }; i2c4: i2c@f03500 { @@ -1240,10 +1236,9 @@ status = "disabled"; label = "I2C_4"; port-num = <4>; - gpio-dev = <&gpioe>; + scl-gpios = <&gpioe 0 0>; + sda-gpios = <&gpioe 7 0>; clock-gate-offset = ; - pinctrl-0 = <&pinctrl_i2c_clk4 /* GPE0 */ - &pinctrl_i2c_data4>; /* GPE7 */ }; i2c5: i2c@f03580 { @@ -1256,10 +1251,9 @@ status = "disabled"; label = "I2C_5"; port-num = <5>; - gpio-dev = <&gpioa>; + scl-gpios = <&gpioa 4 0>; + sda-gpios = <&gpioa 5 0>; clock-gate-offset = ; - pinctrl-0 = <&pinctrl_i2c_clk5 /* GPA4 */ - &pinctrl_i2c_data5>; /* GPA5 */ }; ecpm: clock-controller@f01e00 { diff --git a/dts/riscv/ite/it8xxx2-pinctrl-map.dtsi b/dts/riscv/ite/it8xxx2-pinctrl-map.dtsi index 50f29483a77..5efc84f22c0 100644 --- a/dts/riscv/ite/it8xxx2-pinctrl-map.dtsi +++ b/dts/riscv/ite/it8xxx2-pinctrl-map.dtsi @@ -45,6 +45,50 @@ pinmuxs = <&pinctrll 3 IT8XXX2_ALT_FUNC_1>; }; + /* I2C alternate function */ + i2c0_clk_gpb3_default: i2c0_clk_gpb3_default { + pinmuxs = <&pinctrlb 3 IT8XXX2_ALT_FUNC_1>; + }; + i2c0_data_gpb4_default: i2c0_data_gpb4_default { + pinmuxs = <&pinctrlb 4 IT8XXX2_ALT_FUNC_1>; + }; + i2c1_clk_gpc1_default: i2c1_clk_gpc1_default { + pinmuxs = <&pinctrlc 1 IT8XXX2_ALT_FUNC_1>; + }; + i2c1_data_gpc2_default: i2c1_data_gpc2_default { + pinmuxs = <&pinctrlc 2 IT8XXX2_ALT_FUNC_1>; + }; + i2c2_clk_gpf6_default: i2c2_clk_gpf6_default { + pinmuxs = <&pinctrlf 6 IT8XXX2_ALT_FUNC_1>; + }; + i2c2_data_gpf7_default: i2c2_data_gpf7_default { + pinmuxs = <&pinctrlf 7 IT8XXX2_ALT_FUNC_1>; + }; + i2c3_clk_gph1_default: i2c3_clk_gph1_default { + pinmuxs = <&pinctrlh 1 IT8XXX2_ALT_FUNC_3>; + }; + i2c3_data_gph2_default: i2c3_data_gph2_default { + pinmuxs = <&pinctrlh 2 IT8XXX2_ALT_FUNC_3>; + }; + i2c3_clk_gpf2_default: i2c3_clk_gpf2_default { + pinmuxs = <&pinctrlf 2 IT8XXX2_ALT_FUNC_4>; + }; + i2c3_data_gpf3_default: i2c3_data_gpf3_default { + pinmuxs = <&pinctrlf 3 IT8XXX2_ALT_FUNC_4>; + }; + i2c4_clk_gpe0_default: i2c4_clk_gpe0_default { + pinmuxs = <&pinctrle 0 IT8XXX2_ALT_FUNC_3>; + }; + i2c4_data_gpe7_default: i2c4_data_gpe7_default { + pinmuxs = <&pinctrle 7 IT8XXX2_ALT_FUNC_3>; + }; + i2c5_clk_gpa4_default: i2c5_clk_gpa4_default { + pinmuxs = <&pinctrla 4 IT8XXX2_ALT_FUNC_3>; + }; + i2c5_data_gpa5_default: i2c5_data_gpa5_default { + pinmuxs = <&pinctrla 5 IT8XXX2_ALT_FUNC_3>; + }; + /* UART alternate function */ uart1_rx_gpb0_default: uart1_rx_gpb0_default { pinmuxs = <&pinctrlb 0 IT8XXX2_ALT_FUNC_3>;