drivers: adc: lmp90xxx: make adc_context_start_sampling() ISR safe
Introduce a dedicated function for performing an entire LMP90xxx ADC channel read and sample all channels in one go in the ADC acquisition thread. This removes the SPI transactions from adc_context_start_sampling() which can be called in k_timer ISR context for consecutive ADC reads. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is contained in:
Henrik Brix Andersen
Kumar Gala
parent
9909a46f1f
commit
64bed8add6
1 changed files with 104 additions and 107 deletions
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@ -120,7 +120,6 @@ struct lmp90xxx_config {
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};
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struct lmp90xxx_data {
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struct device *dev;
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struct adc_context ctx;
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struct device *spi_dev;
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struct spi_cs_control spi_cs;
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@ -130,7 +129,6 @@ struct lmp90xxx_data {
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s32_t *buffer;
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s32_t *repeat_buffer;
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u32_t channels;
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u32_t channel_id;
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u8_t channel_odr[LMP90XXX_MAX_CHANNELS];
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#ifdef CONFIG_ADC_LMP90XXX_GPIO
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struct k_mutex gpio_lock;
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@ -138,7 +136,8 @@ struct lmp90xxx_data {
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u8_t gpio_dat;
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#endif /* CONFIG_ADC_LMP90XXX_GPIO */
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struct k_thread thread;
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struct k_sem sem;
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struct k_sem acq_sem;
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struct k_sem drdyb_sem;
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K_THREAD_STACK_MEMBER(stack,
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CONFIG_ADC_LMP90XXX_ACQUISITION_THREAD_STACK_SIZE);
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@ -539,43 +538,6 @@ static int lmp90xxx_adc_read(struct device *dev,
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return lmp90xxx_adc_read_async(dev, sequence, NULL);
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}
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static void lmp90xxx_adc_start_channel(struct device *dev)
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{
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const struct lmp90xxx_config *config = dev->config->config_info;
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struct lmp90xxx_data *data = dev->driver_data;
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u8_t ch_scan;
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int err;
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data->channel_id = find_lsb_set(data->channels) - 1;
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LOG_DBG("starting channel %d", data->channel_id);
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/* Single channel, single scan mode */
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ch_scan = LMP90XXX_CH_SCAN_SEL(0x1) |
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LMP90XXX_FIRST_CH(data->channel_id) |
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LMP90XXX_LAST_CH(data->channel_id);
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err = lmp90xxx_write_reg8(dev, LMP90XXX_REG_CH_SCAN, ch_scan);
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if (err) {
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LOG_ERR("failed to setup scan channels (err %d)", err);
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adc_context_complete(&data->ctx, err);
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return;
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}
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/* Start scan */
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err = lmp90xxx_write_reg8(dev, LMP90XXX_REG_PWRCN, LMP90XXX_PWRCN(0));
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if (err) {
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LOG_ERR("failed to set active mode (err %d)", err);
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adc_context_complete(&data->ctx, err);
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return;
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}
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if (!LMP90XXX_HAS_DRDYB(config)) {
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/* Signal thread to start polling for data ready */
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k_sem_give(&data->sem);
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}
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}
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static void adc_context_start_sampling(struct adc_context *ctx)
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{
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struct lmp90xxx_data *data =
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@ -584,7 +546,7 @@ static void adc_context_start_sampling(struct adc_context *ctx)
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data->channels = ctx->sequence.channels;
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data->repeat_buffer = data->buffer;
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lmp90xxx_adc_start_channel(data->dev);
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k_sem_give(&data->acq_sem);
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}
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static void adc_context_update_buffer_pointer(struct adc_context *ctx,
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@ -598,85 +560,120 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx,
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}
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}
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static void lmp90xxx_acquisition_thread(struct device *dev)
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static int lmp90xxx_adc_read_channel(struct device *dev, u8_t channel,
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s32_t *result)
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{
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const struct lmp90xxx_config *config = dev->config->config_info;
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struct lmp90xxx_data *data = dev->driver_data;
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s32_t result = 0;
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u8_t adc_done;
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u8_t ch_scan;
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u8_t buf[4]; /* ADC_DOUT + CRC */
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s32_t delay;
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u8_t odr;
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int err;
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while (true) {
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k_sem_take(&data->sem, K_FOREVER);
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/* Single channel, single scan mode */
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ch_scan = LMP90XXX_CH_SCAN_SEL(0x1) | LMP90XXX_FIRST_CH(channel) |
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LMP90XXX_LAST_CH(channel);
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if (!LMP90XXX_HAS_DRDYB(config)) {
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odr = data->channel_odr[data->channel_id];
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delay = lmp90xxx_odr_delay_tbl[odr];
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LOG_DBG("sleeping for %d ms", delay);
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k_sleep(delay);
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err = lmp90xxx_write_reg8(dev, LMP90XXX_REG_CH_SCAN, ch_scan);
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if (err) {
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LOG_ERR("failed to setup scan channels (err %d)", err);
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return err;
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}
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/* Poll for data ready */
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do {
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err = lmp90xxx_read_reg8(dev,
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LMP90XXX_REG_ADC_DONE,
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&adc_done);
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if (adc_done == 0xFFU) {
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LOG_DBG("sleeping for 1 ms");
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k_sleep(1);
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} else {
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break;
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}
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} while (true);
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}
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/* Start scan */
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err = lmp90xxx_write_reg8(dev, LMP90XXX_REG_PWRCN, LMP90XXX_PWRCN(0));
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if (err) {
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LOG_ERR("failed to set active mode (err %d)", err);
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return err;
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}
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if (IS_ENABLED(CONFIG_ADC_LMP90XXX_CRC)) {
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err = lmp90xxx_read_reg(dev, LMP90XXX_REG_ADC_DOUT,
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buf, sizeof(buf));
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} else {
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err = lmp90xxx_read_reg(dev, LMP90XXX_REG_ADC_DOUT,
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buf, config->resolution / 8);
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}
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if (LMP90XXX_HAS_DRDYB(config)) {
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k_sem_take(&data->drdyb_sem, K_FOREVER);
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} else {
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odr = data->channel_odr[channel];
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delay = lmp90xxx_odr_delay_tbl[odr];
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LOG_DBG("sleeping for %d ms", delay);
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k_sleep(delay);
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if (err) {
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LOG_ERR("failed to read ADC DOUT (err %d)", err);
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adc_context_complete(&data->ctx, err);
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continue;
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}
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if (IS_ENABLED(CONFIG_ADC_LMP90XXX_CRC)) {
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u8_t crc = crc8(buf, 3, 0x31, 0, false) ^ 0xFFU;
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if (buf[3] != crc) {
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LOG_ERR("CRC mismatch (0x%02x vs. 0x%02x)",
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buf[3], crc);
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adc_context_complete(&data->ctx, -EIO);
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continue;
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/* Poll for data ready */
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do {
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err = lmp90xxx_read_reg8(dev, LMP90XXX_REG_ADC_DONE,
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&adc_done);
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if (adc_done == 0xFFU) {
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LOG_DBG("sleeping for 1 ms");
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k_sleep(1);
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} else {
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break;
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}
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} while (true);
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}
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if (IS_ENABLED(CONFIG_ADC_LMP90XXX_CRC)) {
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err = lmp90xxx_read_reg(dev, LMP90XXX_REG_ADC_DOUT, buf,
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sizeof(buf));
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} else {
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err = lmp90xxx_read_reg(dev, LMP90XXX_REG_ADC_DOUT, buf,
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config->resolution / 8);
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}
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if (err) {
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LOG_ERR("failed to read ADC DOUT (err %d)", err);
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return err;
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}
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if (IS_ENABLED(CONFIG_ADC_LMP90XXX_CRC)) {
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u8_t crc = crc8(buf, 3, 0x31, 0, false) ^ 0xFFU;
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if (buf[3] != crc) {
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LOG_ERR("CRC mismatch (0x%02x vs. 0x%02x)", buf[3],
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crc);
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return err;
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}
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}
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/* Read result, get rid of CRC, and sign extend result */
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*result = (s32_t)sys_get_be32(buf);
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*result >>= (32 - config->resolution);
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return 0;
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}
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static void lmp90xxx_acquisition_thread(struct device *dev)
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{
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struct lmp90xxx_data *data = dev->driver_data;
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s32_t result = 0;
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u8_t channel;
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int err;
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while (true) {
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k_sem_take(&data->acq_sem, K_FOREVER);
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while (data->channels) {
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channel = find_lsb_set(data->channels) - 1;
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LOG_DBG("reading channel %d", channel);
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err = lmp90xxx_adc_read_channel(dev, channel, &result);
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if (err) {
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adc_context_complete(&data->ctx, err);
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break;
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}
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LOG_DBG("finished channel %d, result = %d", channel,
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result);
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/*
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* ADC samples are stored as s32_t regardless of the
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* resolution in order to provide a uniform interface
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* for the driver.
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*/
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*data->buffer++ = result;
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WRITE_BIT(data->channels, channel, 0);
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}
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/* Read result, get rid of CRC, and sign extend result */
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result = (s32_t)sys_get_be32(buf);
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result >>= (32 - config->resolution);
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LOG_DBG("finished channel %d, result = %d", data->channel_id,
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result);
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/*
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* ADC samples are stored as s32_t regardless of the
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* resolution in order to provide a uniform interface
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* for the driver.
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*/
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*data->buffer++ = result;
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data->channels &= ~BIT(data->channel_id);
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if (data->channels) {
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lmp90xxx_adc_start_channel(dev);
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} else {
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adc_context_on_sampling_done(&data->ctx, dev);
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}
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adc_context_on_sampling_done(&data->ctx, dev);
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}
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}
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@ -687,7 +684,7 @@ static void lmp90xxx_drdyb_callback(struct device *port,
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CONTAINER_OF(cb, struct lmp90xxx_data, drdyb_cb);
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/* Signal thread that data is now ready */
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k_sem_give(&data->sem);
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k_sem_give(&data->drdyb_sem);
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}
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#ifdef CONFIG_ADC_LMP90XXX_GPIO
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@ -900,9 +897,9 @@ static int lmp90xxx_init(struct device *dev)
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struct device *drdyb_dev;
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int err;
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data->dev = dev;
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k_mutex_init(&data->ura_lock);
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k_sem_init(&data->sem, 0, 1);
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k_sem_init(&data->acq_sem, 0, 1);
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k_sem_init(&data->drdyb_sem, 0, 1);
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#ifdef CONFIG_ADC_LMP90XXX_GPIO
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k_mutex_init(&data->gpio_lock);
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#endif /* CONFIG_ADC_LMP90XXX_GPIO */
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