From 64b4a3fe0877ee2ee33060dc1dd840ae7d560994 Mon Sep 17 00:00:00 2001 From: Steven Chang Date: Fri, 15 Mar 2024 10:46:27 +0800 Subject: [PATCH] drivers: pinctrl: initial device driver for ENE KB1200 Add pinctrl driver for ENE KB1200 Signed-off-by: Steven Chang --- drivers/pinctrl/CMakeLists.txt | 1 + drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Kconfig.ene | 9 + drivers/pinctrl/pinctrl_ene_kb1200.c | 181 ++++++++++++++++++ .../dt-bindings/pinctrl/ene-kb1200-pinctrl.h | 48 +++++ soc/ene/kb1200/pinctrl_soc.h | 52 +++++ 6 files changed, 292 insertions(+) create mode 100644 drivers/pinctrl/Kconfig.ene create mode 100644 drivers/pinctrl/pinctrl_ene_kb1200.c create mode 100644 include/zephyr/dt-bindings/pinctrl/ene-kb1200-pinctrl.h create mode 100644 soc/ene/kb1200/pinctrl_soc.h diff --git a/drivers/pinctrl/CMakeLists.txt b/drivers/pinctrl/CMakeLists.txt index 4eb87c69909..a0e246ba687 100644 --- a/drivers/pinctrl/CMakeLists.txt +++ b/drivers/pinctrl/CMakeLists.txt @@ -35,6 +35,7 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_TI_CC32XX pinctrl_ti_cc32xx.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_NUMAKER pinctrl_numaker.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_QUICKLOGIC_EOS_S3 pinctrl_eos_s3.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_RW pinctrl_rw_iomux.c) +zephyr_library_sources_ifdef(CONFIG_PINCTRL_ENE_KB1200 pinctrl_ene_kb1200.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_IMX_SCU pinctrl_imx_scu.c) add_subdirectory(renesas) diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index cc2c8800a5d..df96253c9f9 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -63,6 +63,7 @@ source "drivers/pinctrl/Kconfig.ti_cc32xx" source "drivers/pinctrl/Kconfig.numaker" source "drivers/pinctrl/Kconfig.eos_s3" source "drivers/pinctrl/Kconfig.rw" +source "drivers/pinctrl/Kconfig.ene" source "drivers/pinctrl/Kconfig.zynqmp" rsource "renesas/Kconfig" diff --git a/drivers/pinctrl/Kconfig.ene b/drivers/pinctrl/Kconfig.ene new file mode 100644 index 00000000000..d885aa57fd5 --- /dev/null +++ b/drivers/pinctrl/Kconfig.ene @@ -0,0 +1,9 @@ +# Copyright (c) 2023 ENE Technology Inc. +# SPDX-License-Identifier: Apache-2.0 + +config PINCTRL_ENE_KB1200 + bool "ENE KB1200 Pin controller driver" + default y + depends on DT_HAS_ENE_KB1200_PINCTRL_ENABLED + help + Enable pin controller driver for ENE KB1200 MCUs diff --git a/drivers/pinctrl/pinctrl_ene_kb1200.c b/drivers/pinctrl/pinctrl_ene_kb1200.c new file mode 100644 index 00000000000..27500325719 --- /dev/null +++ b/drivers/pinctrl/pinctrl_ene_kb1200.c @@ -0,0 +1,181 @@ +/* + * Copyright (c) ENE Technology Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT ene_kb1200_pinctrl + +#include +#include +#include +#include +#include +#include +#include + +/* + * PINMUX_FUNC_A : GPIO Function + * PINMUX_FUNC_B : AltOutput 1 Function + * PINMUX_FUNC_C : AltOutput 2 Function + * PINMUX_FUNC_D : AltOutput 3 Function + * PINMUX_FUNC_E : AltOutput 4 Function + * + * GPIO Alternate Output Function Selection + * (PINMUX_FUNC_A) (PINMUX_FUNC_B) (PINMUX_FUNC_C) (PINMUX_FUNC_D) (PINMUX_FUNC_E) + * GPIO00 PWMLED0 PWM8 + * GPIO01 SER_RXD1 UART_SIN SBUD_DAT + * GPIO03 SER_TXD1 UART_SOUT SBUD_CLK + * GPIO22 ESBDAT PWM9 + * GPIO28 32KOUT SERCLK2 + * GPIO36 UARTSOUT SERTXD2 + * GPIO5C KSO6 P80DAT + * GPIO5D KSO7 P80CLK + * GPIO5E KSO8 SERRXD1 + * GPIO5F KSO9 SERTXD1 + * GPIO71 SDA8 UARTRTS + * GPIO38 SCL4 PWM1 + */ + +/* + * f is function number + * b[7:5] = pin bank + * b[4:0] = pin position in bank + * b[11:8] = function + */ + +#define ENE_KB1200_PINMUX_PIN(p) FIELD_GET(GENMASK(4, 0), p) +#define ENE_KB1200_PINMUX_PORT(p) FIELD_GET(GENMASK(7, 5), p) +#define ENE_KB1200_PINMUX_FUNC(p) FIELD_GET(GENMASK(11, 8), p) +#define ENE_KB1200_PINMUX_PORT_PIN(p) FIELD_GET(GENMASK(7, 0), p) + +static const uint32_t gcfg_reg_addr = DT_REG_ADDR(DT_NODELABEL(gcfg)); +static const uint32_t gpio_reg_bases[] = { + DT_REG_ADDR(DT_NODELABEL(gpio0x1x)), + DT_REG_ADDR(DT_NODELABEL(gpio2x3x)), + DT_REG_ADDR(DT_NODELABEL(gpio4x5x)), + DT_REG_ADDR(DT_NODELABEL(gpio6x7x)), +}; + +static int kb1200_config_pin(uint32_t gpio, uint32_t conf, uint32_t func) +{ + uint32_t port = ENE_KB1200_PINMUX_PORT(gpio); + uint32_t pin = (uint32_t)ENE_KB1200_PINMUX_PIN(gpio); + struct gpio_regs *gpio_regs = (struct gpio_regs *)gpio_reg_bases[port]; + struct gcfg_regs *gcfg_regs = (struct gcfg_regs *)gcfg_reg_addr; + + if (port >= NUM_KB1200_GPIO_PORTS) { + return -EINVAL; + } + + if (func == PINMUX_FUNC_GPIO) { /* only GPIO function */ + WRITE_BIT(gpio_regs->GPIOFS, pin, 0); + } else { + func -= 1; /*for change to GPIOALT setting value*/ + switch (gpio) { + case GPIO00_PWMLED0_PWM8: + WRITE_BIT(gcfg_regs->GPIOALT, 0, func); + break; + case GPIO01_SERRXD1_UARTSIN: + gcfg_regs->GPIOMUX = (gcfg_regs->GPIOMUX & ~(3 << 9)) | (func << 9); + break; + case GPIO03_SERTXD1_UARTSOUT: + gcfg_regs->GPIOMUX = (gcfg_regs->GPIOMUX & ~(3 << 9)) | (func << 9); + break; + case GPIO22_ESBDAT_PWM9: + WRITE_BIT(gcfg_regs->GPIOALT, 1, func); + break; + case GPIO28_32KOUT_SERCLK2: + WRITE_BIT(gcfg_regs->GPIOALT, 2, func); + break; + case GPIO36_UARTSOUT_SERTXD2: + WRITE_BIT(gcfg_regs->GPIOALT, 3, func); + break; + case GPIO5C_KSO6_P80DAT: + WRITE_BIT(gcfg_regs->GPIOALT, 4, func); + break; + case GPIO5D_KSO7_P80CLK: + WRITE_BIT(gcfg_regs->GPIOALT, 5, func); + break; + case GPIO5E_KSO8_SERRXD1: + WRITE_BIT(gcfg_regs->GPIOALT, 6, func); + break; + case GPIO5F_KSO9_SERTXD1: + WRITE_BIT(gcfg_regs->GPIOALT, 7, func); + break; + case GPIO71_SDA8_UARTRTS: + WRITE_BIT(gcfg_regs->GPIOALT, 8, func); + break; + case GPIO38_SCL4_PWM1: + WRITE_BIT(gcfg_regs->GPIOALT, 9, func); + break; + } + WRITE_BIT(gpio_regs->GPIOFS, pin, 1); + } + /*Input always enable for loopback*/ + WRITE_BIT(gpio_regs->GPIOIE, pin, 1); + + if (conf & BIT(ENE_KB1200_NO_PUD_POS)) { + WRITE_BIT(gpio_regs->GPIOPU, pin, 0); + WRITE_BIT(gpio_regs->GPIOPD, pin, 0); + } + if (conf & BIT(ENE_KB1200_PU_POS)) { + WRITE_BIT(gpio_regs->GPIOPU, pin, 1); + } + if (conf & BIT(ENE_KB1200_PD_POS)) { + WRITE_BIT(gpio_regs->GPIOPD, pin, 1); + } + + if (conf & BIT(ENE_KB1200_OUT_DIS_POS)) { + WRITE_BIT(gpio_regs->GPIOOE, pin, 0); + } + if (conf & BIT(ENE_KB1200_OUT_EN_POS)) { + WRITE_BIT(gpio_regs->GPIOOE, pin, 1); + } + + if (conf & BIT(ENE_KB1200_OUT_LO_POS)) { + WRITE_BIT(gpio_regs->GPIOD, pin, 0); + } + if (conf & BIT(ENE_KB1200_OUT_HI_POS)) { + WRITE_BIT(gpio_regs->GPIOD, pin, 1); + } + + if (conf & BIT(ENE_KB1200_PUSH_PULL_POS)) { + WRITE_BIT(gpio_regs->GPIOOD, pin, 0); + } + if (conf & BIT(ENE_KB1200_OPEN_DRAIN_POS)) { + WRITE_BIT(gpio_regs->GPIOOD, pin, 1); + } + + if (conf & BIT(ENE_KB1200_PIN_LOW_POWER_POS)) { + WRITE_BIT(gpio_regs->GPIOLV, pin, 1); + } + + return 0; +} + +int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg) +{ + uint32_t portpin, pinmux, func; + int ret; + + ARG_UNUSED(reg); + + for (uint8_t i = 0U; i < pin_cnt; i++) { + pinmux = pins[i]; + + func = ENE_KB1200_PINMUX_FUNC(pinmux); + if (func >= PINMUX_FUNC_MAX) { + return -EINVAL; + } + + portpin = ENE_KB1200_PINMUX_PORT_PIN(pinmux); + + ret = kb1200_config_pin(portpin, pinmux, func); + if (ret < 0) { + return ret; + } + } + + return 0; +} diff --git a/include/zephyr/dt-bindings/pinctrl/ene-kb1200-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/ene-kb1200-pinctrl.h new file mode 100644 index 00000000000..7ed0320d9f8 --- /dev/null +++ b/include/zephyr/dt-bindings/pinctrl/ene-kb1200-pinctrl.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) ENE Technology Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ENE_KB1200_PINCTRL_H_ +#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ENE_KB1200_PINCTRL_H_ + +#include + +#define PINMUX_FUNC_GPIO 0x00 +#define PINMUX_FUNC_A 0x00 +#define PINMUX_FUNC_B 0x01 +#define PINMUX_FUNC_C 0x02 +#define PINMUX_FUNC_D 0x03 +#define PINMUX_FUNC_MAX 0x04 + +#define ENE_KB1200_NO_PUD_POS 12 +#define ENE_KB1200_PD_POS 13 +#define ENE_KB1200_PU_POS 14 +#define ENE_KB1200_PUSH_PULL_POS 15 +#define ENE_KB1200_OPEN_DRAIN_POS 16 +#define ENE_KB1200_OUT_DIS_POS 17 +#define ENE_KB1200_OUT_EN_POS 18 +#define ENE_KB1200_OUT_HI_POS 19 +#define ENE_KB1200_OUT_LO_POS 20 +#define ENE_KB1200_PIN_LOW_POWER_POS 21 + +#define ENE_KB1200_PINMUX_PORT_POS 5 +#define ENE_KB1200_PINMUX_PORT_MSK 0x7 +#define ENE_KB1200_PINMUX_PIN_POS 0 +#define ENE_KB1200_PINMUX_PIN_MSK 0x1f +#define ENE_KB1200_PINMUX_FUNC_POS 8 +#define ENE_KB1200_PINMUX_FUNC_MSK 0xf + +/* + * f is function number + * b[7:5] = pin bank + * b[4:0] = pin position in bank + * b[11:8] = function + */ +#define ENE_KB1200_PINMUX(n, f) \ + (((((n) >> 5) & ENE_KB1200_PINMUX_PORT_MSK) << ENE_KB1200_PINMUX_PORT_POS) | \ + (((n) & ENE_KB1200_PINMUX_PIN_MSK) << ENE_KB1200_PINMUX_PIN_POS) | \ + (((f) & ENE_KB1200_PINMUX_FUNC_MSK) << ENE_KB1200_PINMUX_FUNC_POS)) + +#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ENE_KB1200_PINCTRL_H_ */ diff --git a/soc/ene/kb1200/pinctrl_soc.h b/soc/ene/kb1200/pinctrl_soc.h new file mode 100644 index 00000000000..74fdc0ae8aa --- /dev/null +++ b/soc/ene/kb1200/pinctrl_soc.h @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2023 ENE Technology Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_SOC_ARM_KB1200_PINCTRL_SOC_H_ +#define ZEPHYR_SOC_ARM_KB1200_PINCTRL_SOC_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @cond INTERNAL_HIDDEN */ + +typedef uint32_t pinctrl_soc_pin_t; + +/* initialize pinmux member fields of pinctrl_pin_t */ +#define Z_PINCTRL_ENE_KB1200_PINMUX_INIT(node_id) (uint32_t)(DT_PROP(node_id, pinmux)) + +#define Z_PINCTRL_STATE_PINCFG_INIT(node_id) \ + ((DT_PROP(node_id, bias_disable) << ENE_KB1200_NO_PUD_POS) | \ + (DT_PROP(node_id, bias_pull_down) << ENE_KB1200_PD_POS) | \ + (DT_PROP(node_id, bias_pull_up) << ENE_KB1200_PU_POS) | \ + (DT_PROP(node_id, drive_push_pull) << ENE_KB1200_PUSH_PULL_POS) | \ + (DT_PROP(node_id, drive_open_drain) << ENE_KB1200_OPEN_DRAIN_POS) | \ + (DT_PROP(node_id, output_disable) << ENE_KB1200_OUT_DIS_POS) | \ + (DT_PROP(node_id, output_enable) << ENE_KB1200_OUT_EN_POS) | \ + (DT_PROP(node_id, output_high) << ENE_KB1200_OUT_HI_POS) | \ + (DT_PROP(node_id, output_low) << ENE_KB1200_OUT_LO_POS) | \ + (DT_PROP(node_id, low_power_enable) << ENE_KB1200_PIN_LOW_POWER_POS)) + +/* initialize pin structure members */ +#define Z_PINCTRL_STATE_PIN_INIT(node_id, state_prop, idx) \ + (Z_PINCTRL_ENE_KB1200_PINMUX_INIT(DT_PROP_BY_IDX(node_id, state_prop, idx)) | \ + Z_PINCTRL_STATE_PINCFG_INIT(DT_PROP_BY_IDX(node_id, state_prop, idx))), + +/* Use DT FOREACH macro to initialize each used pin */ +#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ + { \ + DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT) \ + } + +/** @endcond */ + +#ifdef __cplusplus +} +#endif + +#endif /* ZEPHYR_SOC_ARM_KB1200_PINCTRL_SOC_H_ */