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drivers: spi: silabs: remove gecko from name

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Gecko is being phased out so we changed every mention of gecko in the
silabs spi drivers

Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
This commit is contained in:
Yishai Jaffe 2025-01-14 15:59:25 +02:00 • committed by Benjamin Cabé
commit 62ea40bb9e
16 changed files with 163 additions and 162 deletions
Download patch file Download diff file Expand all files Collapse all files

2
boards/silabs/dev_kits/sltb004a/sltb004a.dts
View file

@ -81,7 +81,7 @@
};
&usart2 {
compatible = "silabs,gecko-spi-usart";
compatible = "silabs,usart-spi";
#address-cells = <1>;
#size-cells = <0>;

2
boards/silabs/radio_boards/common/efr32-series1-common.dtsi
View file

@ -64,7 +64,7 @@
};
&usart1 {
compatible = "silabs,gecko-spi-usart";
compatible = "silabs,usart-spi";
#address-cells = <1>;
#size-cells = <0>;

2
boards/silabs/radio_boards/slwrb4161a/slwrb4161a.dts
View file

@ -69,7 +69,7 @@
};
&usart2 {
compatible = "silabs,gecko-spi-usart";
compatible = "silabs,usart-spi";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&usart2_default>;

2
boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p.dts
View file

@ -73,7 +73,7 @@
};
&eusart1 {
compatible = "silabs,gecko-spi-eusart";
compatible = "silabs,eusart-spi";
#address-cells = <1>;
#size-cells = <0>;

4
drivers/pinctrl/pinctrl_gecko.c
View file

@ -142,7 +142,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
#endif /* CONFIG_SOC_FAMILY_SILABS_S1 */
#endif /* CONFIG_UART_GECKO */
#ifdef CONFIG_SPI_GECKO_USART
#ifdef CONFIG_SPI_SILABS_USART
#ifdef CONFIG_SOC_FAMILY_SILABS_S1
case GECKO_FUN_SPIM_SCK:
pin_config.mode = gpioModePushPull;
@ -224,7 +224,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
base->ROUTELOC0 |= (loc << _USART_ROUTELOC0_CSLOC_SHIFT);
break;
#endif /* CONFIG_SOC_FAMILY_SILABS_S1 */
#endif /* CONFIG_SPI_GECKO_USART */
#endif /* CONFIG_SPI_SILABS_USART */
#ifdef CONFIG_I2C_GECKO
case GECKO_FUN_I2C_SDA:

4
drivers/spi/CMakeLists.txt
View file

@ -23,8 +23,6 @@ zephyr_library_sources_ifdef(CONFIG_SPI_CC13XX_CC26XX spi_cc13xx_cc26xx.c)
zephyr_library_sources_ifdef(CONFIG_SPI_DW spi_dw.c)
zephyr_library_sources_ifdef(CONFIG_SPI_EMUL spi_emul.c)
zephyr_library_sources_ifdef(CONFIG_SPI_GD32 spi_gd32.c)
zephyr_library_sources_ifdef(CONFIG_SPI_GECKO_EUSART spi_gecko_eusart.c)
zephyr_library_sources_ifdef(CONFIG_SPI_GECKO_USART spi_gecko_usart.c)
zephyr_library_sources_ifdef(CONFIG_SPI_GRLIB_SPIMCTRL spi_grlib_spimctrl.c)
zephyr_library_sources_ifdef(CONFIG_SPI_INFINEON_CAT1 spi_ifx_cat1.c)
zephyr_library_sources_ifdef(CONFIG_SPI_ITE_IT8XXX2 spi_it8xxx2.c)
@ -55,6 +53,8 @@ zephyr_library_sources_ifdef(CONFIG_SPI_SAM spi_sam.c)
zephyr_library_sources_ifdef(CONFIG_SPI_SAM0 spi_sam0.c)
zephyr_library_sources_ifdef(CONFIG_SPI_SEDI spi_sedi.c)
zephyr_library_sources_ifdef(CONFIG_SPI_SIFIVE spi_sifive.c)
zephyr_library_sources_ifdef(CONFIG_SPI_SILABS_EUSART spi_silabs_eusart.c)
zephyr_library_sources_ifdef(CONFIG_SPI_SILABS_USART spi_silabs_usart.c)
zephyr_library_sources_ifdef(CONFIG_SPI_SMARTBOND spi_smartbond.c)
zephyr_library_sources_ifdef(CONFIG_SPI_STM32 spi_ll_stm32.c)
zephyr_library_sources_ifdef(CONFIG_SPI_TELINK_B91 spi_b91.c)

4
drivers/spi/Kconfig
View file

@ -84,8 +84,6 @@ source "drivers/spi/Kconfig.cc13xx_cc26xx"
source "drivers/spi/Kconfig.dw"
source "drivers/spi/Kconfig.esp32"
source "drivers/spi/Kconfig.gd32"
source "drivers/spi/Kconfig.gecko_eusart"
source "drivers/spi/Kconfig.gecko_usart"
source "drivers/spi/Kconfig.grlib_spimctrl"
source "drivers/spi/Kconfig.ifx_cat1"
source "drivers/spi/Kconfig.it8xxx2"
@ -114,6 +112,8 @@ source "drivers/spi/Kconfig.sam"
source "drivers/spi/Kconfig.sam0"
source "drivers/spi/Kconfig.sedi"
source "drivers/spi/Kconfig.sifive"
source "drivers/spi/Kconfig.silabs_eusart"
source "drivers/spi/Kconfig.silabs_usart"
source "drivers/spi/Kconfig.smartbond"
source "drivers/spi/Kconfig.spi_emul"
source "drivers/spi/Kconfig.stm32"

10
drivers/spi/Kconfig.gecko_eusart → drivers/spi/Kconfig.silabs_eusart
View file

@ -1,14 +1,14 @@
# Gecko SPI configuration option
# Silabs EUSART SPI configuration option
# Copyright (c) 2024 Daikin Comfort Technologies North America, Inc.
# SPDX-License-Identifier: Apache-2.0
config SPI_GECKO_EUSART
bool "Gecko EUSART SPI controller driver"
config SPI_SILABS_EUSART
bool "Silabs EUSART SPI controller driver"
default y
depends on DT_HAS_SILABS_GECKO_SPI_EUSART_ENABLED
depends on DT_HAS_SILABS_EUSART_SPI_ENABLED
depends on GPIO
select SOC_GECKO_EUSART
select PINCTRL if SOC_FAMILY_SILABS_S2
help
Enable the EUSART SPI peripherals on Gecko
Enable the EUSART SPI driver

10
drivers/spi/Kconfig.gecko_usart → drivers/spi/Kconfig.silabs_usart
View file

@ -1,15 +1,15 @@
# Gecko SPI configuration option
# Silabs USART SPI configuration option
# Copyright (c) 2019 Christian Taedcke <hacking@taedcke.com>
# SPDX-License-Identifier: Apache-2.0
config SPI_GECKO_USART
bool "Gecko SPI controller driver"
config SPI_SILABS_USART
bool "Silabs USART SPI controller driver"
default y
depends on DT_HAS_SILABS_GECKO_SPI_USART_ENABLED
depends on DT_HAS_SILABS_USART_SPI_ENABLED
depends on GPIO
select SOC_GECKO_USART
select CLOCK_CONTROL_SILABS_SERIES if SOC_FAMILY_SILABS_S2
select PINCTRL if SOC_FAMILY_SILABS_S2
help
Enable the SPI peripherals on Gecko
Enable the USART SPI driver

123
drivers/spi/spi_gecko_eusart.c → drivers/spi/spi_silabs_eusart.c
View file

@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT silabs_gecko_spi_eusart
#define DT_DRV_COMPAT silabs_eusart_spi
#include <stdbool.h>
@ -19,7 +19,7 @@
#include <em_cmu.h>
#include <em_eusart.h>
LOG_MODULE_REGISTER(spi_gecko_eusart, CONFIG_SPI_LOG_LEVEL);
LOG_MODULE_REGISTER(spi_silabs_eusart, CONFIG_SPI_LOG_LEVEL);
#include "spi_context.h"
@ -27,11 +27,11 @@ LOG_MODULE_REGISTER(spi_gecko_eusart, CONFIG_SPI_LOG_LEVEL);
/* Structure Declarations */
struct spi_gecko_eusart_data {
struct spi_silabs_eusart_data {
struct spi_context ctx;
};
struct spi_gecko_eusart_config {
struct spi_silabs_eusart_config {
EUSART_TypeDef *base;
const struct device *clock_dev;
const struct silabs_clock_control_cmu_config clock_cfg;
@ -40,11 +40,11 @@ struct spi_gecko_eusart_config {
};
/* Helper Functions */
static int spi_eusart_config(const struct device *dev, const struct spi_config *config,
static int spi_silabs_eusart_configure(const struct device *dev, const struct spi_config *config,
uint16_t *control)
{
struct spi_gecko_eusart_data *data = dev->data;
const struct spi_gecko_eusart_config *gecko_config = dev->config;
struct spi_silabs_eusart_data *data = dev->data;
const struct spi_silabs_eusart_config *eusart_config = dev->config;
uint32_t spi_frequency;
EUSART_SpiAdvancedInit_TypeDef eusartAdvancedSpiInit = EUSART_SPI_ADVANCED_INIT_DEFAULT;
@ -52,8 +52,8 @@ static int spi_eusart_config(const struct device *dev, const struct spi_config *
int err;
err = clock_control_get_rate(gecko_config->clock_dev,
(clock_control_subsys_t)&gecko_config->clock_cfg,
err = clock_control_get_rate(eusart_config->clock_dev,
(clock_control_subsys_t)&eusart_config->clock_cfg,
&spi_frequency);
if (err) {
return err;
@ -91,11 +91,11 @@ static int spi_eusart_config(const struct device *dev, const struct spi_config *
* user has configured the controller to, and the max frequency for the
* transaction.
*/
if (gecko_config->clock_frequency > spi_frequency) {
if (eusart_config->clock_frequency > spi_frequency) {
LOG_ERR("SPI clock-frequency too high");
return -EINVAL;
}
spi_frequency = MIN(gecko_config->clock_frequency, spi_frequency);
spi_frequency = MIN(eusart_config->clock_frequency, spi_frequency);
if (config->frequency) {
spi_frequency = MIN(config->frequency, spi_frequency);
}
@ -134,24 +134,24 @@ static int spi_eusart_config(const struct device *dev, const struct spi_config *
eusartInit.advancedSettings = &eusartAdvancedSpiInit;
/* Enable EUSART clock */
err = clock_control_on(gecko_config->clock_dev,
(clock_control_subsys_t)&gecko_config->clock_cfg);
err = clock_control_on(eusart_config->clock_dev,
(clock_control_subsys_t)&eusart_config->clock_cfg);
if (err < 0) {
return err;
}
/* Initialize the EUSART */
EUSART_SpiInit(gecko_config->base, &eusartInit);
EUSART_SpiInit(eusart_config->base, &eusartInit);
data->ctx.config = config;
/* Enable the peripheral */
gecko_config->base->CMD = (uint32_t)eusartEnable;
eusart_config->base->CMD = (uint32_t)eusartEnable;
return 0;
}
static void spi_gecko_eusart_send(EUSART_TypeDef *eusart, uint8_t frame)
static void spi_silabs_eusart_send(EUSART_TypeDef *eusart, uint8_t frame)
{
/* Write frame to register */
EUSART_Tx(eusart, frame);
@ -161,18 +161,18 @@ static void spi_gecko_eusart_send(EUSART_TypeDef *eusart, uint8_t frame)
}
}
static uint8_t spi_gecko_eusart_recv(EUSART_TypeDef *eusart)
static uint8_t spi_silabs_eusart_recv(EUSART_TypeDef *eusart)
{
/* Return data inside rx register */
return EUSART_Rx(eusart);
}
static bool spi_eusart_transfer_ongoing(struct spi_gecko_eusart_data *data)
static bool spi_silabs_eusart_transfer_ongoing(struct spi_silabs_eusart_data *data)
{
return spi_context_tx_on(&data->ctx) || spi_context_rx_on(&data->ctx);
}
static inline uint8_t spi_eusart_next_tx(struct spi_gecko_eusart_data *data)
static inline uint8_t spi_silabs_eusart_next_tx(struct spi_silabs_eusart_data *data)
{
uint8_t tx_frame = 0;
@ -183,16 +183,17 @@ static inline uint8_t spi_eusart_next_tx(struct spi_gecko_eusart_data *data)
return tx_frame;
}
static int spi_eusart_shift_frames(EUSART_TypeDef *eusart, struct spi_gecko_eusart_data *data)
static int spi_silabs_eusart_shift_frames(EUSART_TypeDef *eusart,
struct spi_silabs_eusart_data *data)
{
uint8_t tx_frame;
uint8_t rx_frame;
tx_frame = spi_eusart_next_tx(data);
spi_gecko_eusart_send(eusart, tx_frame);
tx_frame = spi_silabs_eusart_next_tx(data);
spi_silabs_eusart_send(eusart, tx_frame);
spi_context_update_tx(&data->ctx, 1, 1);
rx_frame = spi_gecko_eusart_recv(eusart);
rx_frame = spi_silabs_eusart_recv(eusart);
if (spi_context_rx_buf_on(&data->ctx)) {
UNALIGNED_PUT(rx_frame, (uint8_t *)data->ctx.rx_buf);
@ -201,31 +202,31 @@ static int spi_eusart_shift_frames(EUSART_TypeDef *eusart, struct spi_gecko_eusa
return 0;
}
static void spi_gecko_eusart_xfer(const struct device *dev, const struct spi_config *config)
static void spi_silabs_eusart_xfer(const struct device *dev, const struct spi_config *config)
{
int ret;
struct spi_gecko_eusart_data *data = dev->data;
struct spi_silabs_eusart_data *data = dev->data;
struct spi_context *ctx = &data->ctx;
const struct spi_gecko_eusart_config *gecko_config = dev->config;
const struct spi_silabs_eusart_config *eusart_config = dev->config;
spi_context_cs_control(ctx, true);
do {
ret = spi_eusart_shift_frames(gecko_config->base, data);
} while (!ret && spi_eusart_transfer_ongoing(data));
ret = spi_silabs_eusart_shift_frames(eusart_config->base, data);
} while (!ret && spi_silabs_eusart_transfer_ongoing(data));
spi_context_cs_control(ctx, false);
spi_context_complete(ctx, dev, 0);
}
/* API Functions */
static int spi_gecko_eusart_init(const struct device *dev)
static int spi_silabs_eusart_init(const struct device *dev)
{
int err;
const struct spi_gecko_eusart_config *config = dev->config;
struct spi_gecko_eusart_data *data = dev->data;
const struct spi_silabs_eusart_config *eusart_config = dev->config;
struct spi_silabs_eusart_data *data = dev->data;
err = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
err = pinctrl_apply_state(eusart_config->pcfg, PINCTRL_STATE_DEFAULT);
if (err < 0) {
return err;
}
@ -239,24 +240,24 @@ static int spi_gecko_eusart_init(const struct device *dev)
return 0;
}
static int spi_gecko_eusart_transceive(const struct device *dev, const struct spi_config *config,
static int spi_silabs_eusart_transceive(const struct device *dev, const struct spi_config *config,
const struct spi_buf_set *tx_bufs,
const struct spi_buf_set *rx_bufs)
{
struct spi_gecko_eusart_data *data = dev->data;
struct spi_silabs_eusart_data *data = dev->data;
uint16_t control = 0;
int ret;
spi_context_lock(&data->ctx, false, NULL, NULL, config);
ret = spi_eusart_config(dev, config, &control);
ret = spi_silabs_eusart_configure(dev, config, &control);
if (ret < 0) {
spi_context_release(&data->ctx, ret);
return ret;
}
spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 1);
spi_gecko_eusart_xfer(dev, config);
spi_silabs_eusart_xfer(dev, config);
spi_context_release(&data->ctx, ret);
@ -264,7 +265,7 @@ static int spi_gecko_eusart_transceive(const struct device *dev, const struct sp
}
#ifdef CONFIG_SPI_ASYNC
static int spi_gecko_eusart_transceive_async(const struct device *dev,
static int spi_silabs_eusart_transceive_async(const struct device *dev,
const struct spi_config *config,
const struct spi_buf_set *tx_bufs,
const struct spi_buf_set *rx_bufs,
@ -274,43 +275,43 @@ static int spi_gecko_eusart_transceive_async(const struct device *dev,
}
#endif /* CONFIG_SPI_ASYNC */
static int spi_gecko_eusart_release(const struct device *dev, const struct spi_config *config)
static int spi_silabs_eusart_release(const struct device *dev, const struct spi_config *config)
{
const struct spi_gecko_eusart_config *gecko_config = dev->config;
struct spi_gecko_eusart_data *data = dev->data;
const struct spi_silabs_eusart_config *eusart_config = dev->config;
struct spi_silabs_eusart_data *data = dev->data;
spi_context_unlock_unconditionally(&data->ctx);
if (!(gecko_config->base->STATUS & EUSART_STATUS_TXIDLE)) {
if (!(eusart_config->base->STATUS & EUSART_STATUS_TXIDLE)) {
return -EBUSY;
}
return 0;
}
/* Device Instantiation */
static DEVICE_API(spi, spi_gecko_eusart_api) = {
.transceive = spi_gecko_eusart_transceive,
static DEVICE_API(spi, spi_silabs_eusart_api) = {
.transceive = spi_silabs_eusart_transceive,
#ifdef CONFIG_SPI_ASYNC
.transceive_async = spi_gecko_eusart_transceive_async,
.transceive_async = spi_silabs_eusart_transceive_async,
#endif /* CONFIG_SPI_ASYNC */
.release = spi_gecko_eusart_release,
.release = spi_silabs_eusart_release,
};
#define SPI_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \
static struct spi_gecko_eusart_data spi_gecko_eusart_data_##n = { \
SPI_CONTEXT_INIT_LOCK(spi_gecko_eusart_data_##n, ctx), \
SPI_CONTEXT_INIT_SYNC(spi_gecko_eusart_data_##n, ctx), \
SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx)}; \
static struct spi_gecko_eusart_config spi_gecko_eusart_cfg_##n = { \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.base = (EUSART_TypeDef *)DT_INST_REG_ADDR(n), \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
.clock_cfg = SILABS_DT_INST_CLOCK_CFG(n), \
.clock_frequency = DT_INST_PROP_OR(n, clock_frequency, 1000000) \
}; \
SPI_DEVICE_DT_INST_DEFINE(n, spi_gecko_eusart_init, NULL, &spi_gecko_eusart_data_##n, \
&spi_gecko_eusart_cfg_##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \
&spi_gecko_eusart_api);
#define SPI_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \
static struct spi_silabs_eusart_data spi_silabs_eusart_data_##n = { \
SPI_CONTEXT_INIT_LOCK(spi_silabs_eusart_data_##n, ctx), \
SPI_CONTEXT_INIT_SYNC(spi_silabs_eusart_data_##n, ctx), \
SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx)}; \
static struct spi_silabs_eusart_config spi_silabs_eusart_cfg_##n = { \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.base = (EUSART_TypeDef *)DT_INST_REG_ADDR(n), \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
.clock_cfg = SILABS_DT_INST_CLOCK_CFG(n), \
.clock_frequency = DT_INST_PROP_OR(n, clock_frequency, 1000000) \
}; \
SPI_DEVICE_DT_INST_DEFINE(n, spi_silabs_eusart_init, NULL, &spi_silabs_eusart_data_##n, \
&spi_silabs_eusart_cfg_##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY,\
&spi_silabs_eusart_api);
DT_INST_FOREACH_STATUS_OKAY(SPI_INIT)

142
drivers/spi/spi_gecko_usart.c → drivers/spi/spi_silabs_usart.c
View file

@ -4,11 +4,11 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT silabs_gecko_spi_usart
#define DT_DRV_COMPAT silabs_usart_spi
#define LOG_LEVEL CONFIG_SPI_LOG_LEVEL
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(spi_gecko);
LOG_MODULE_REGISTER(spi_silabs_usart);
#include "spi_context.h"
#include <zephyr/sys/sys_io.h>
@ -33,12 +33,12 @@ LOG_MODULE_REGISTER(spi_gecko);
#ifdef CONFIG_CLOCK_CONTROL
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/clock_control_silabs.h>
#define GET_GECKO_USART_CLOCK(idx) \
#define GET_USART_CLOCK(idx) \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(idx)), \
.clock_cfg = SILABS_DT_INST_CLOCK_CFG(idx),
#elif DT_NODE_HAS_PROP(n, peripheral_id)
#define CLOCK_USART(id) _CONCAT(cmuClock_USART, id)
#define GET_GECKO_USART_CLOCK(n) \
#define GET_USART_CLOCK(n) \
.clock = CLOCK_USART(DT_INST_PROP(n, peripheral_id)),
#else
#if (USART_COUNT == 1)
@ -77,7 +77,7 @@ LOG_MODULE_REGISTER(spi_gecko);
#else
#error "Undefined number of USARTs."
#endif /* USART_COUNT */
#define GET_GECKO_USART_CLOCK(id) \
#define GET_USART_CLOCK(id) \
.clock = CLOCK_USART((USART_TypeDef *)DT_INST_REG_ADDR(id)),
#endif /* DT_NODE_HAS_PROP(n, peripheral_id) */
@ -86,11 +86,11 @@ LOG_MODULE_REGISTER(spi_gecko);
/* Structure Declarations */
struct spi_gecko_data {
struct spi_silabs_usart_data {
struct spi_context ctx;
};
struct spi_gecko_config {
struct spi_silabs_usart_config {
USART_TypeDef *base;
#ifdef CONFIG_CLOCK_CONTROL
const struct device *clock_dev;
@ -117,16 +117,16 @@ static int spi_config(const struct device *dev,
const struct spi_config *config,
uint16_t *control)
{
const struct spi_gecko_config *gecko_config = dev->config;
struct spi_gecko_data *data = dev->data;
mem_addr_t ctrl_reg = (mem_addr_t)&gecko_config->base->CTRL;
const struct spi_silabs_usart_config *usart_config = dev->config;
struct spi_silabs_usart_data *data = dev->data;
mem_addr_t ctrl_reg = (mem_addr_t)&usart_config->base->CTRL;
uint32_t spi_frequency;
#ifdef CONFIG_CLOCK_CONTROL
int err;
err = clock_control_get_rate(gecko_config->clock_dev,
(clock_control_subsys_t)&gecko_config->clock_cfg,
err = clock_control_get_rate(usart_config->clock_dev,
(clock_control_subsys_t)&usart_config->clock_cfg,
&spi_frequency);
if (err) {
return err;
@ -134,7 +134,7 @@ static int spi_config(const struct device *dev,
/* Max supported SPI frequency is half the source clock */
spi_frequency /= 2;
#else
spi_frequency = CMU_ClockFreqGet(gecko_config->clock) / 2;
spi_frequency = CMU_ClockFreqGet(usart_config->clock) / 2;
#endif
if (config->operation & SPI_HALF_DUPLEX) {
@ -174,39 +174,39 @@ static int spi_config(const struct device *dev,
* user has configured the controller to, and the max frequency for the
* transaction.
*/
if (gecko_config->clock_frequency > spi_frequency) {
if (usart_config->clock_frequency > spi_frequency) {
LOG_ERR("SPI clock-frequency too high");
return -EINVAL;
}
spi_frequency = MIN(gecko_config->clock_frequency, spi_frequency);
spi_frequency = MIN(usart_config->clock_frequency, spi_frequency);
if (config->frequency) {
spi_frequency = MIN(config->frequency, spi_frequency);
}
USART_BaudrateSyncSet(gecko_config->base, 0, spi_frequency);
USART_BaudrateSyncSet(usart_config->base, 0, spi_frequency);
/* Set Loopback */
if (config->operation & SPI_MODE_LOOP) {
gecko_config->base->CTRL |= USART_CTRL_LOOPBK;
usart_config->base->CTRL |= USART_CTRL_LOOPBK;
} else {
gecko_config->base->CTRL &= ~USART_CTRL_LOOPBK;
usart_config->base->CTRL &= ~USART_CTRL_LOOPBK;
}
/* Set CPOL */
if (config->operation & SPI_MODE_CPOL) {
gecko_config->base->CTRL |= USART_CTRL_CLKPOL;
usart_config->base->CTRL |= USART_CTRL_CLKPOL;
} else {
gecko_config->base->CTRL &= ~USART_CTRL_CLKPOL;
usart_config->base->CTRL &= ~USART_CTRL_CLKPOL;
}
/* Set CPHA */
if (config->operation & SPI_MODE_CPHA) {
gecko_config->base->CTRL |= USART_CTRL_CLKPHA;
usart_config->base->CTRL |= USART_CTRL_CLKPHA;
} else {
gecko_config->base->CTRL &= ~USART_CTRL_CLKPHA;
usart_config->base->CTRL &= ~USART_CTRL_CLKPHA;
}
/* Set word size */
gecko_config->base->FRAME = usartDatabits8
usart_config->base->FRAME = usartDatabits8
| USART_FRAME_STOPBITS_DEFAULT
| USART_FRAME_PARITY_DEFAULT;
@ -216,7 +216,7 @@ static int spi_config(const struct device *dev,
return 0;
}
static void spi_gecko_send(USART_TypeDef *usart, uint8_t frame)
static void spi_silabs_usart_send(USART_TypeDef *usart, uint8_t frame)
{
/* Write frame to register */
USART_Tx(usart, frame);
@ -226,18 +226,18 @@ static void spi_gecko_send(USART_TypeDef *usart, uint8_t frame)
}
}
static uint8_t spi_gecko_recv(USART_TypeDef *usart)
static uint8_t spi_silabs_usart_recv(USART_TypeDef *usart)
{
/* Return data inside rx register */
return (uint8_t)usart->RXDATA;
}
static bool spi_gecko_transfer_ongoing(struct spi_gecko_data *data)
static bool spi_silabs_usart_transfer_ongoing(struct spi_silabs_usart_data *data)
{
return spi_context_tx_on(&data->ctx) || spi_context_rx_on(&data->ctx);
}
static inline uint8_t spi_gecko_next_tx(struct spi_gecko_data *data)
static inline uint8_t spi_silabs_usart_next_tx(struct spi_silabs_usart_data *data)
{
uint8_t tx_frame = 0;
@ -248,17 +248,17 @@ static inline uint8_t spi_gecko_next_tx(struct spi_gecko_data *data)
return tx_frame;
}
static int spi_gecko_shift_frames(USART_TypeDef *usart,
struct spi_gecko_data *data)
static int spi_silabs_usart_shift_frames(USART_TypeDef *usart,
struct spi_silabs_usart_data *data)
{
uint8_t tx_frame;
uint8_t rx_frame;
tx_frame = spi_gecko_next_tx(data);
spi_gecko_send(usart, tx_frame);
tx_frame = spi_silabs_usart_next_tx(data);
spi_silabs_usart_send(usart, tx_frame);
spi_context_update_tx(&data->ctx, 1, 1);
rx_frame = spi_gecko_recv(usart);
rx_frame = spi_silabs_usart_recv(usart);
if (spi_context_rx_buf_on(&data->ctx)) {
UNALIGNED_PUT(rx_frame, (uint8_t *)data->ctx.rx_buf);
@ -268,28 +268,28 @@ static int spi_gecko_shift_frames(USART_TypeDef *usart,
}
static void spi_gecko_xfer(const struct device *dev,
static void spi_silabs_usart_xfer(const struct device *dev,
const struct spi_config *config)
{
int ret;
struct spi_gecko_data *data = dev->data;
struct spi_silabs_usart_data *data = dev->data;
struct spi_context *ctx = &data->ctx;
const struct spi_gecko_config *gecko_config = dev->config;
const struct spi_silabs_usart_config *usart_config = dev->config;
spi_context_cs_control(ctx, true);
do {
ret = spi_gecko_shift_frames(gecko_config->base, data);
} while (!ret && spi_gecko_transfer_ongoing(data));
ret = spi_silabs_usart_shift_frames(usart_config->base, data);
} while (!ret && spi_silabs_usart_transfer_ongoing(data));
spi_context_cs_control(ctx, false);
spi_context_complete(ctx, dev, 0);
}
#ifndef CONFIG_PINCTRL
static void spi_gecko_init_pins(const struct device *dev)
static void spi_silabs_usart_init_pins(const struct device *dev)
{
const struct spi_gecko_config *config = dev->config;
const struct spi_silabs_usart_config *config = dev->config;
GPIO_PinModeSet(config->pin_rx.port, config->pin_rx.pin,
config->pin_rx.mode, config->pin_rx.out);
@ -316,11 +316,11 @@ static void spi_gecko_init_pins(const struct device *dev)
/* API Functions */
static int spi_gecko_init(const struct device *dev)
static int spi_silabs_usart_init(const struct device *dev)
{
int err;
const struct spi_gecko_config *config = dev->config;
struct spi_gecko_data *data = dev->data;
const struct spi_silabs_usart_config *config = dev->config;
struct spi_silabs_usart_data *data = dev->data;
USART_InitSync_TypeDef usartInit = USART_INITSYNC_DEFAULT;
/* The peripheral and gpio clock are already enabled from soc and gpio
@ -359,7 +359,7 @@ static int spi_gecko_init(const struct device *dev)
}
#else
/* Initialize USART pins */
spi_gecko_init_pins(dev);
spi_silabs_usart_init_pins(dev);
#endif /* CONFIG_PINCTRL */
err = spi_context_cs_configure_all(&data->ctx);
@ -375,12 +375,12 @@ static int spi_gecko_init(const struct device *dev)
return 0;
}
static int spi_gecko_transceive(const struct device *dev,
static int spi_silabs_usart_transceive(const struct device *dev,
const struct spi_config *config,
const struct spi_buf_set *tx_bufs,
const struct spi_buf_set *rx_bufs)
{
struct spi_gecko_data *data = dev->data;
struct spi_silabs_usart_data *data = dev->data;
uint16_t control = 0;
int ret;
@ -393,7 +393,7 @@ static int spi_gecko_transceive(const struct device *dev,
}
spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 1);
spi_gecko_xfer(dev, config);
spi_silabs_usart_xfer(dev, config);
spi_context_release(&data->ctx, ret);
@ -401,7 +401,7 @@ static int spi_gecko_transceive(const struct device *dev,
}
#ifdef CONFIG_SPI_ASYNC
static int spi_gecko_transceive_async(const struct device *dev,
static int spi_silabs_usart_transceive_async(const struct device *dev,
const struct spi_config *config,
const struct spi_buf_set *tx_bufs,
const struct spi_buf_set *rx_bufs,
@ -411,10 +411,10 @@ static int spi_gecko_transceive_async(const struct device *dev,
}
#endif /* CONFIG_SPI_ASYNC */
static int spi_gecko_release(const struct device *dev,
static int spi_silabs_usart_release(const struct device *dev,
const struct spi_config *config)
{
struct spi_gecko_data *data = dev->data;
struct spi_silabs_usart_data *data = dev->data;
spi_context_unlock_unconditionally(&data->ctx);
@ -422,51 +422,51 @@ static int spi_gecko_release(const struct device *dev,
}
/* Device Instantiation */
static DEVICE_API(spi, spi_gecko_api) = {
.transceive = spi_gecko_transceive,
static DEVICE_API(spi, spi_silabs_usart_api) = {
.transceive = spi_silabs_usart_transceive,
#ifdef CONFIG_SPI_ASYNC
.transceive_async = spi_gecko_transceive_async,
.transceive_async = spi_silabs_usart_transceive_async,
#endif /* CONFIG_SPI_ASYNC */
#ifdef CONFIG_SPI_RTIO
.iodev_submit = spi_rtio_iodev_default_submit,
#endif
.release = spi_gecko_release,
.release = spi_silabs_usart_release,
};
#ifdef CONFIG_PINCTRL
#define SPI_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \
static struct spi_gecko_data spi_gecko_data_##n = { \
SPI_CONTEXT_INIT_LOCK(spi_gecko_data_##n, ctx), \
SPI_CONTEXT_INIT_SYNC(spi_gecko_data_##n, ctx), \
static struct spi_silabs_usart_data spi_silabs_usart_data_##n = { \
SPI_CONTEXT_INIT_LOCK(spi_silabs_usart_data_##n, ctx), \
SPI_CONTEXT_INIT_SYNC(spi_silabs_usart_data_##n, ctx), \
SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx) \
}; \
static struct spi_gecko_config spi_gecko_cfg_##n = { \
static struct spi_silabs_usart_config spi_silabs_usart_cfg_##n = { \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.base = (USART_TypeDef *) \
DT_INST_REG_ADDR(n), \
GET_GECKO_USART_CLOCK(n) \
GET_USART_CLOCK(n) \
.clock_frequency = DT_INST_PROP_OR(n, clock_frequency, 1000000) \
}; \
SPI_DEVICE_DT_INST_DEFINE(n, \
spi_gecko_init, \
spi_silabs_usart_init, \
NULL, \
&spi_gecko_data_##n, \
&spi_gecko_cfg_##n, \
&spi_silabs_usart_data_##n, \
&spi_silabs_usart_cfg_##n, \
POST_KERNEL, \
CONFIG_SPI_INIT_PRIORITY, \
&spi_gecko_api);
&spi_silabs_usart_api);
#else
#define SPI_INIT(n) \
static struct spi_gecko_data spi_gecko_data_##n = { \
SPI_CONTEXT_INIT_LOCK(spi_gecko_data_##n, ctx), \
SPI_CONTEXT_INIT_SYNC(spi_gecko_data_##n, ctx), \
static struct spi_silabs_usart_data spi_silabs_usart_data_##n = { \
SPI_CONTEXT_INIT_LOCK(spi_silabs_usart_data_##n, ctx), \
SPI_CONTEXT_INIT_SYNC(spi_silabs_usart_data_##n, ctx), \
SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx) \
}; \
static struct spi_gecko_config spi_gecko_cfg_##n = { \
static struct spi_silabs_usart_config spi_silabs_usart_cfg_##n = { \
.base = (USART_TypeDef *) \
DT_INST_REG_ADDR(n), \
GET_GECKO_USART_CLOCK(n) \
GET_USART_CLOCK(n) \
.clock_frequency = DT_INST_PROP_OR(n, clock_frequency, 1000000), \
.pin_rx = { DT_INST_PROP_BY_IDX(n, location_rx, 1), \
DT_INST_PROP_BY_IDX(n, location_rx, 2), \
@ -482,13 +482,13 @@ static DEVICE_API(spi, spi_gecko_api) = {
.loc_clk = DT_INST_PROP_BY_IDX(n, location_clk, 0), \
}; \
SPI_DEVICE_DT_INST_DEFINE(n, \
spi_gecko_init, \
spi_silabs_usart_init, \
NULL, \
&spi_gecko_data_##n, \
&spi_gecko_cfg_##n, \
&spi_silabs_usart_data_##n, \
&spi_silabs_usart_cfg_##n, \
POST_KERNEL, \
CONFIG_SPI_INIT_PRIORITY, \
&spi_gecko_api);
&spi_silabs_usart_api);
#endif /* CONFIG_PINCTRL */
DT_INST_FOREACH_STATUS_OKAY(SPI_INIT)

2
dts/arm/silabs/efr32bg2x.dtsi
View file

@ -233,7 +233,7 @@
};
usart0: usart@5005c000 {
compatible = "silabs,gecko-spi-usart";
compatible = "silabs,usart-spi";
reg = <0x5005C000 0x400>;
interrupt-names = "rx", "tx";
#address-cells = <1>;

4
dts/arm/silabs/efr32mg24.dtsi
View file

@ -286,7 +286,7 @@
};
eusart0: eusart@5b010000 {
compatible = "silabs,gecko-spi-eusart";
compatible = "silabs,eusart-spi";
reg = <0x5B010000 0x4000>;
interrupts = <11 0>, <12 0>;
interrupt-names = "rx", "tx";
@ -295,7 +295,7 @@
};
eusart1: eusart@500a0000 {
compatible = "silabs,gecko-spi-eusart";
compatible = "silabs,eusart-spi";
reg = <0x500A0000 0x4000>;
interrupts = <13 0>, <14 0>;
interrupt-names = "rx", "tx";

6
dts/arm/silabs/efr32xg23.dtsi
View file

@ -296,7 +296,7 @@
};
eusart0: eusart@5b010000 {
compatible = "silabs,gecko-spi-eusart";
compatible = "silabs,eusart-spi";
reg = <0x5B010000 0x4000>;
interrupts = <11 0>, <12 0>;
interrupt-names = "rx", "tx";
@ -305,7 +305,7 @@
};
eusart1: eusart@500a0000 {
compatible = "silabs,gecko-spi-eusart";
compatible = "silabs,eusart-spi";
reg = <0x500A0000 0x4000>;
interrupts = <13 0>, <14 0>;
interrupt-names = "rx", "tx";
@ -314,7 +314,7 @@
};
eusart2: eusart@500a4000 {
compatible = "silabs,gecko-spi-eusart";
compatible = "silabs,eusart-spi";
reg = <0x500A4000 0x4000>;
interrupts = <15 0>, <16 0>;
interrupt-names = "rx", "tx";

4
dts/bindings/spi/silabs,gecko-spi-eusart.yaml → dts/bindings/spi/silabs,eusart-spi.yaml
View file

@ -1,6 +1,6 @@
description: GECKO EUSART SPI
description: Silabs EUSART SPI
compatible: "silabs,gecko-spi-eusart"
compatible: "silabs,eusart-spi"
include: [spi-controller.yaml, pinctrl-device.yaml]

4
dts/bindings/spi/silabs,gecko-spi-usart.yaml → dts/bindings/spi/silabs,usart-spi.yaml
View file

@ -1,6 +1,6 @@
description: GECKO USART SPI
description: Silabs USART SPI
compatible: "silabs,gecko-spi-usart"
compatible: "silabs,usart-spi"
include: [spi-controller.yaml, pinctrl-device.yaml]