mdio: rename argument devad to regad
Rename argument `devad` to `regad` to indicate this is the register address in a given PHY device and to not be confused with the Clause 45 device address within a port. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
parent
9f9aaf83f4
commit
62b28cb443
6 changed files with 50 additions and 49 deletions
|
@ -131,7 +131,7 @@ int adin2111_mdio_c45_write(const struct device *dev, uint8_t prtad,
|
||||||
}
|
}
|
||||||
|
|
||||||
static int mdio_adin2111_read(const struct device *dev, uint8_t prtad,
|
static int mdio_adin2111_read(const struct device *dev, uint8_t prtad,
|
||||||
uint8_t devad, uint16_t *data)
|
uint8_t regad, uint16_t *data)
|
||||||
{
|
{
|
||||||
const struct mdio_adin2111_config *const cfg = dev->config;
|
const struct mdio_adin2111_config *const cfg = dev->config;
|
||||||
uint32_t read;
|
uint32_t read;
|
||||||
|
@ -141,7 +141,7 @@ static int mdio_adin2111_read(const struct device *dev, uint8_t prtad,
|
||||||
cmd = BIT(28);
|
cmd = BIT(28);
|
||||||
cmd |= 0x3U << 26;
|
cmd |= 0x3U << 26;
|
||||||
cmd |= (prtad & 0x1FU) << 21;
|
cmd |= (prtad & 0x1FU) << 21;
|
||||||
cmd |= (devad & 0x1FU) << 16;
|
cmd |= (regad & 0x1FU) << 16;
|
||||||
|
|
||||||
ret = eth_adin2111_reg_write(cfg->adin, ADIN2111_MDIOACC0, cmd);
|
ret = eth_adin2111_reg_write(cfg->adin, ADIN2111_MDIOACC0, cmd);
|
||||||
if (ret >= 0) {
|
if (ret >= 0) {
|
||||||
|
@ -153,7 +153,7 @@ static int mdio_adin2111_read(const struct device *dev, uint8_t prtad,
|
||||||
}
|
}
|
||||||
|
|
||||||
static int mdio_adin2111_write(const struct device *dev, uint8_t prtad,
|
static int mdio_adin2111_write(const struct device *dev, uint8_t prtad,
|
||||||
uint8_t devad, uint16_t data)
|
uint8_t regad, uint16_t data)
|
||||||
{
|
{
|
||||||
const struct mdio_adin2111_config *const cfg = dev->config;
|
const struct mdio_adin2111_config *const cfg = dev->config;
|
||||||
uint32_t cmd;
|
uint32_t cmd;
|
||||||
|
@ -163,7 +163,7 @@ static int mdio_adin2111_write(const struct device *dev, uint8_t prtad,
|
||||||
cmd = BIT(28);
|
cmd = BIT(28);
|
||||||
cmd |= BIT(26);
|
cmd |= BIT(26);
|
||||||
cmd |= (prtad & 0x1FU) << 21;
|
cmd |= (prtad & 0x1FU) << 21;
|
||||||
cmd |= (devad & 0x1FU) << 16;
|
cmd |= (regad & 0x1FU) << 16;
|
||||||
cmd |= data;
|
cmd |= data;
|
||||||
|
|
||||||
ret = eth_adin2111_reg_write(cfg->adin, ADIN2111_MDIOACC0, cmd);
|
ret = eth_adin2111_reg_write(cfg->adin, ADIN2111_MDIOACC0, cmd);
|
||||||
|
|
|
@ -30,7 +30,7 @@ struct mdio_esp32_dev_config {
|
||||||
const struct pinctrl_dev_config *pcfg;
|
const struct pinctrl_dev_config *pcfg;
|
||||||
};
|
};
|
||||||
|
|
||||||
static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad,
|
static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t regad,
|
||||||
bool write, uint16_t data_in, uint16_t *data_out)
|
bool write, uint16_t data_in, uint16_t *data_out)
|
||||||
{
|
{
|
||||||
struct mdio_esp32_dev_data *const dev_data = dev->data;
|
struct mdio_esp32_dev_data *const dev_data = dev->data;
|
||||||
|
@ -46,7 +46,7 @@ static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad,
|
||||||
if (write) {
|
if (write) {
|
||||||
emac_ll_set_phy_data(dev_data->hal.mac_regs, data_in);
|
emac_ll_set_phy_data(dev_data->hal.mac_regs, data_in);
|
||||||
}
|
}
|
||||||
emac_hal_set_phy_cmd(&dev_data->hal, prtad, devad, write);
|
emac_hal_set_phy_cmd(&dev_data->hal, prtad, regad, write);
|
||||||
|
|
||||||
/* Poll until operation complete */
|
/* Poll until operation complete */
|
||||||
bool success = false;
|
bool success = false;
|
||||||
|
@ -73,17 +73,17 @@ static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int mdio_esp32_read(const struct device *dev, uint8_t prtad, uint8_t devad,
|
static int mdio_esp32_read(const struct device *dev, uint8_t prtad, uint8_t regad,
|
||||||
uint16_t *data)
|
uint16_t *data)
|
||||||
{
|
{
|
||||||
return mdio_transfer(dev, prtad, devad, false, 0, data);
|
return mdio_transfer(dev, prtad, regad, false, 0, data);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static int mdio_esp32_write(const struct device *dev, uint8_t prtad,
|
static int mdio_esp32_write(const struct device *dev, uint8_t prtad,
|
||||||
uint8_t devad, uint16_t data)
|
uint8_t regad, uint16_t data)
|
||||||
{
|
{
|
||||||
return mdio_transfer(dev, prtad, devad, true, data, NULL);
|
return mdio_transfer(dev, prtad, regad, true, data, NULL);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mdio_esp32_bus_enable(const struct device *dev)
|
static void mdio_esp32_bus_enable(const struct device *dev)
|
||||||
|
|
|
@ -25,7 +25,7 @@ struct nxp_s32_mdio_data {
|
||||||
};
|
};
|
||||||
|
|
||||||
static int nxp_s32_mdio_read(const struct device *dev, uint8_t prtad,
|
static int nxp_s32_mdio_read(const struct device *dev, uint8_t prtad,
|
||||||
uint8_t devad, uint16_t *regval)
|
uint8_t regad, uint16_t *regval)
|
||||||
{
|
{
|
||||||
const struct nxp_s32_mdio_config *const cfg = dev->config;
|
const struct nxp_s32_mdio_config *const cfg = dev->config;
|
||||||
struct nxp_s32_mdio_data *data = dev->data;
|
struct nxp_s32_mdio_data *data = dev->data;
|
||||||
|
@ -37,14 +37,14 @@ static int nxp_s32_mdio_read(const struct device *dev, uint8_t prtad,
|
||||||
}
|
}
|
||||||
|
|
||||||
k_mutex_lock(&data->rw_mutex, K_FOREVER);
|
k_mutex_lock(&data->rw_mutex, K_FOREVER);
|
||||||
status = Netc_EthSwt_Ip_ReadTrcvRegister(NETC_SWT_IDX, prtad, devad, regval);
|
status = Netc_EthSwt_Ip_ReadTrcvRegister(NETC_SWT_IDX, prtad, regad, regval);
|
||||||
k_mutex_unlock(&data->rw_mutex);
|
k_mutex_unlock(&data->rw_mutex);
|
||||||
|
|
||||||
return status == E_OK ? 0 : -EIO;
|
return status == E_OK ? 0 : -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int nxp_s32_mdio_write(const struct device *dev, uint8_t prtad,
|
static int nxp_s32_mdio_write(const struct device *dev, uint8_t prtad,
|
||||||
uint8_t devad, uint16_t regval)
|
uint8_t regad, uint16_t regval)
|
||||||
{
|
{
|
||||||
const struct nxp_s32_mdio_config *const cfg = dev->config;
|
const struct nxp_s32_mdio_config *const cfg = dev->config;
|
||||||
struct nxp_s32_mdio_data *data = dev->data;
|
struct nxp_s32_mdio_data *data = dev->data;
|
||||||
|
@ -56,7 +56,7 @@ static int nxp_s32_mdio_write(const struct device *dev, uint8_t prtad,
|
||||||
}
|
}
|
||||||
|
|
||||||
k_mutex_lock(&data->rw_mutex, K_FOREVER);
|
k_mutex_lock(&data->rw_mutex, K_FOREVER);
|
||||||
status = Netc_EthSwt_Ip_WriteTrcvRegister(NETC_SWT_IDX, prtad, devad, regval);
|
status = Netc_EthSwt_Ip_WriteTrcvRegister(NETC_SWT_IDX, prtad, regad, regval);
|
||||||
k_mutex_unlock(&data->rw_mutex);
|
k_mutex_unlock(&data->rw_mutex);
|
||||||
|
|
||||||
return status == E_OK ? 0 : -EIO;
|
return status == E_OK ? 0 : -EIO;
|
||||||
|
|
|
@ -34,7 +34,7 @@ struct mdio_sam_dev_config {
|
||||||
int protocol;
|
int protocol;
|
||||||
};
|
};
|
||||||
|
|
||||||
static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad,
|
static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t regad,
|
||||||
uint8_t rw, uint16_t data_in, uint16_t *data_out)
|
uint8_t rw, uint16_t data_in, uint16_t *data_out)
|
||||||
{
|
{
|
||||||
const struct mdio_sam_dev_config *const cfg = dev->config;
|
const struct mdio_sam_dev_config *const cfg = dev->config;
|
||||||
|
@ -48,7 +48,7 @@ static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad,
|
||||||
cfg->regs->GMAC_MAN = (GMAC_MAN_OP(rw ? 0x2 : 0x3))
|
cfg->regs->GMAC_MAN = (GMAC_MAN_OP(rw ? 0x2 : 0x3))
|
||||||
| GMAC_MAN_WTN(0x02)
|
| GMAC_MAN_WTN(0x02)
|
||||||
| GMAC_MAN_PHYA(prtad)
|
| GMAC_MAN_PHYA(prtad)
|
||||||
| GMAC_MAN_REGA(devad)
|
| GMAC_MAN_REGA(regad)
|
||||||
| GMAC_MAN_DATA(data_in);
|
| GMAC_MAN_DATA(data_in);
|
||||||
|
|
||||||
} else if (cfg->protocol == CLAUSE_22) {
|
} else if (cfg->protocol == CLAUSE_22) {
|
||||||
|
@ -56,7 +56,7 @@ static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad,
|
||||||
| (GMAC_MAN_OP(rw ? 0x2 : 0x1))
|
| (GMAC_MAN_OP(rw ? 0x2 : 0x1))
|
||||||
| GMAC_MAN_WTN(0x02)
|
| GMAC_MAN_WTN(0x02)
|
||||||
| GMAC_MAN_PHYA(prtad)
|
| GMAC_MAN_PHYA(prtad)
|
||||||
| GMAC_MAN_REGA(devad)
|
| GMAC_MAN_REGA(regad)
|
||||||
| GMAC_MAN_DATA(data_in);
|
| GMAC_MAN_DATA(data_in);
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
|
@ -84,16 +84,16 @@ static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int mdio_sam_read(const struct device *dev, uint8_t prtad, uint8_t devad,
|
static int mdio_sam_read(const struct device *dev, uint8_t prtad, uint8_t regad,
|
||||||
uint16_t *data)
|
uint16_t *data)
|
||||||
{
|
{
|
||||||
return mdio_transfer(dev, prtad, devad, 1, 0, data);
|
return mdio_transfer(dev, prtad, regad, 1, 0, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int mdio_sam_write(const struct device *dev, uint8_t prtad,
|
static int mdio_sam_write(const struct device *dev, uint8_t prtad,
|
||||||
uint8_t devad, uint16_t data)
|
uint8_t regad, uint16_t data)
|
||||||
{
|
{
|
||||||
return mdio_transfer(dev, prtad, devad, 0, data, NULL);
|
return mdio_transfer(dev, prtad, regad, 0, data, NULL);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mdio_sam_bus_enable(const struct device *dev)
|
static void mdio_sam_bus_enable(const struct device *dev)
|
||||||
|
|
|
@ -35,14 +35,14 @@ LOG_MODULE_REGISTER(mdio_shell, CONFIG_LOG_DEFAULT_LEVEL);
|
||||||
/*
|
/*
|
||||||
* Scan the entire 5-bit address space of the MDIO bus
|
* Scan the entire 5-bit address space of the MDIO bus
|
||||||
*
|
*
|
||||||
* scan [<dev_addr>]
|
* scan [<reg_addr>]
|
||||||
*/
|
*/
|
||||||
static int cmd_mdio_scan(const struct shell *sh, size_t argc, char **argv)
|
static int cmd_mdio_scan(const struct shell *sh, size_t argc, char **argv)
|
||||||
{
|
{
|
||||||
const struct device *dev;
|
const struct device *dev;
|
||||||
int cnt;
|
int cnt;
|
||||||
uint16_t data;
|
uint16_t data;
|
||||||
uint16_t dev_addr;
|
uint16_t reg_addr;
|
||||||
|
|
||||||
dev = DEVICE_DT_GET(MDIO_NODE_ID);
|
dev = DEVICE_DT_GET(MDIO_NODE_ID);
|
||||||
if (!device_is_ready(dev)) {
|
if (!device_is_ready(dev)) {
|
||||||
|
@ -52,21 +52,21 @@ static int cmd_mdio_scan(const struct shell *sh, size_t argc, char **argv)
|
||||||
}
|
}
|
||||||
|
|
||||||
if (argc >= 2) {
|
if (argc >= 2) {
|
||||||
dev_addr = strtol(argv[1], NULL, 16);
|
reg_addr = strtol(argv[1], NULL, 16);
|
||||||
} else {
|
} else {
|
||||||
dev_addr = 0;
|
reg_addr = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
shell_print(sh,
|
shell_print(sh,
|
||||||
"Scanning bus for devices. Reading register 0x%x",
|
"Scanning bus for devices. Reading register 0x%x",
|
||||||
dev_addr);
|
reg_addr);
|
||||||
cnt = 0;
|
cnt = 0;
|
||||||
|
|
||||||
mdio_bus_enable(dev);
|
mdio_bus_enable(dev);
|
||||||
|
|
||||||
for (int i = 0; i < 32; i++) {
|
for (int i = 0; i < 32; i++) {
|
||||||
data = 0;
|
data = 0;
|
||||||
if (mdio_read(dev, i, dev_addr, &data) >= 0 &&
|
if (mdio_read(dev, i, reg_addr, &data) >= 0 &&
|
||||||
data != UINT16_MAX) {
|
data != UINT16_MAX) {
|
||||||
cnt++;
|
cnt++;
|
||||||
shell_print(sh, "Found MDIO device @ 0x%x", i);
|
shell_print(sh, "Found MDIO device @ 0x%x", i);
|
||||||
|
@ -80,12 +80,12 @@ static int cmd_mdio_scan(const struct shell *sh, size_t argc, char **argv)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* mdio write <port_addr> <dev_addr> <data> */
|
/* mdio write <port_addr> <reg_addr> <data> */
|
||||||
static int cmd_mdio_write(const struct shell *sh, size_t argc, char **argv)
|
static int cmd_mdio_write(const struct shell *sh, size_t argc, char **argv)
|
||||||
{
|
{
|
||||||
const struct device *dev;
|
const struct device *dev;
|
||||||
uint16_t data;
|
uint16_t data;
|
||||||
uint16_t dev_addr;
|
uint16_t reg_addr;
|
||||||
uint16_t port_addr;
|
uint16_t port_addr;
|
||||||
|
|
||||||
dev = DEVICE_DT_GET(MDIO_NODE_ID);
|
dev = DEVICE_DT_GET(MDIO_NODE_ID);
|
||||||
|
@ -96,12 +96,12 @@ static int cmd_mdio_write(const struct shell *sh, size_t argc, char **argv)
|
||||||
}
|
}
|
||||||
|
|
||||||
port_addr = strtol(argv[1], NULL, 16);
|
port_addr = strtol(argv[1], NULL, 16);
|
||||||
dev_addr = strtol(argv[2], NULL, 16);
|
reg_addr = strtol(argv[2], NULL, 16);
|
||||||
data = strtol(argv[3], NULL, 16);
|
data = strtol(argv[3], NULL, 16);
|
||||||
|
|
||||||
mdio_bus_enable(dev);
|
mdio_bus_enable(dev);
|
||||||
|
|
||||||
if (mdio_write(dev, port_addr, dev_addr, data) < 0) {
|
if (mdio_write(dev, port_addr, reg_addr, data) < 0) {
|
||||||
shell_error(sh, "Failed to write to device: %s", dev->name);
|
shell_error(sh, "Failed to write to device: %s", dev->name);
|
||||||
mdio_bus_disable(dev);
|
mdio_bus_disable(dev);
|
||||||
|
|
||||||
|
@ -113,12 +113,12 @@ static int cmd_mdio_write(const struct shell *sh, size_t argc, char **argv)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* mdio read <port_addr> <dev_addr> */
|
/* mdio read <port_addr> <reg_addr> */
|
||||||
static int cmd_mdio_read(const struct shell *sh, size_t argc, char **argv)
|
static int cmd_mdio_read(const struct shell *sh, size_t argc, char **argv)
|
||||||
{
|
{
|
||||||
const struct device *dev;
|
const struct device *dev;
|
||||||
uint16_t data;
|
uint16_t data;
|
||||||
uint16_t dev_addr;
|
uint16_t reg_addr;
|
||||||
uint16_t port_addr;
|
uint16_t port_addr;
|
||||||
|
|
||||||
dev = DEVICE_DT_GET(MDIO_NODE_ID);
|
dev = DEVICE_DT_GET(MDIO_NODE_ID);
|
||||||
|
@ -129,11 +129,11 @@ static int cmd_mdio_read(const struct shell *sh, size_t argc, char **argv)
|
||||||
}
|
}
|
||||||
|
|
||||||
port_addr = strtol(argv[1], NULL, 16);
|
port_addr = strtol(argv[1], NULL, 16);
|
||||||
dev_addr = strtol(argv[2], NULL, 16);
|
reg_addr = strtol(argv[2], NULL, 16);
|
||||||
|
|
||||||
mdio_bus_enable(dev);
|
mdio_bus_enable(dev);
|
||||||
|
|
||||||
if (mdio_read(dev, port_addr, dev_addr, &data) < 0) {
|
if (mdio_read(dev, port_addr, reg_addr, &data) < 0) {
|
||||||
shell_error(sh, "Failed to read from device: %s", dev->name);
|
shell_error(sh, "Failed to read from device: %s", dev->name);
|
||||||
mdio_bus_disable(dev);
|
mdio_bus_disable(dev);
|
||||||
|
|
||||||
|
@ -142,20 +142,20 @@ static int cmd_mdio_read(const struct shell *sh, size_t argc, char **argv)
|
||||||
|
|
||||||
mdio_bus_disable(dev);
|
mdio_bus_disable(dev);
|
||||||
|
|
||||||
shell_print(sh, "%x[%x]: 0x%x", port_addr, dev_addr, data);
|
shell_print(sh, "%x[%x]: 0x%x", port_addr, reg_addr, data);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
SHELL_STATIC_SUBCMD_SET_CREATE(sub_mdio_cmds,
|
SHELL_STATIC_SUBCMD_SET_CREATE(sub_mdio_cmds,
|
||||||
SHELL_CMD_ARG(scan, NULL,
|
SHELL_CMD_ARG(scan, NULL,
|
||||||
"Scan MDIO bus for devices: scan [<dev_addr>]",
|
"Scan MDIO bus for devices: scan [<reg_addr>]",
|
||||||
cmd_mdio_scan, 0, 1),
|
cmd_mdio_scan, 0, 1),
|
||||||
SHELL_CMD_ARG(read, NULL,
|
SHELL_CMD_ARG(read, NULL,
|
||||||
"Read from MDIO device: read <phy_addr> <dev_addr>",
|
"Read from MDIO device: read <phy_addr> <reg_addr>",
|
||||||
cmd_mdio_read, 3, 0),
|
cmd_mdio_read, 3, 0),
|
||||||
SHELL_CMD_ARG(write, NULL,
|
SHELL_CMD_ARG(write, NULL,
|
||||||
"Write to MDIO device: write <phy_addr> <dev_addr> <value>",
|
"Write to MDIO device: write <phy_addr> <reg_addr> <value>",
|
||||||
cmd_mdio_write, 4, 0),
|
cmd_mdio_write, 4, 0),
|
||||||
SHELL_SUBCMD_SET_END /* Array terminated. */
|
SHELL_SUBCMD_SET_END /* Array terminated. */
|
||||||
);
|
);
|
||||||
|
|
|
@ -6,6 +6,7 @@
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2021 IP-Logix Inc.
|
* Copyright (c) 2021 IP-Logix Inc.
|
||||||
|
* Copyright 2023 NXP
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*/
|
*/
|
||||||
|
@ -47,11 +48,11 @@ __subsystem struct mdio_driver_api {
|
||||||
void (*bus_disable)(const struct device *dev);
|
void (*bus_disable)(const struct device *dev);
|
||||||
|
|
||||||
/** Read data from MDIO bus */
|
/** Read data from MDIO bus */
|
||||||
int (*read)(const struct device *dev, uint8_t prtad, uint8_t devad,
|
int (*read)(const struct device *dev, uint8_t prtad, uint8_t regad,
|
||||||
uint16_t *data);
|
uint16_t *data);
|
||||||
|
|
||||||
/** Write data to MDIO bus */
|
/** Write data to MDIO bus */
|
||||||
int (*write)(const struct device *dev, uint8_t prtad, uint8_t devad,
|
int (*write)(const struct device *dev, uint8_t prtad, uint8_t regad,
|
||||||
uint16_t data);
|
uint16_t data);
|
||||||
};
|
};
|
||||||
/**
|
/**
|
||||||
|
@ -98,23 +99,23 @@ static inline void z_impl_mdio_bus_disable(const struct device *dev)
|
||||||
*
|
*
|
||||||
* @param[in] dev Pointer to the device structure for the controller
|
* @param[in] dev Pointer to the device structure for the controller
|
||||||
* @param[in] prtad Port address
|
* @param[in] prtad Port address
|
||||||
* @param[in] devad Device address
|
* @param[in] regad Register address
|
||||||
* @param data Pointer to receive read data
|
* @param data Pointer to receive read data
|
||||||
*
|
*
|
||||||
* @retval 0 If successful.
|
* @retval 0 If successful.
|
||||||
* @retval -EIO General input / output error.
|
* @retval -EIO General input / output error.
|
||||||
* @retval -ETIMEDOUT If transaction timedout on the bus
|
* @retval -ETIMEDOUT If transaction timedout on the bus
|
||||||
*/
|
*/
|
||||||
__syscall int mdio_read(const struct device *dev, uint8_t prtad, uint8_t devad,
|
__syscall int mdio_read(const struct device *dev, uint8_t prtad, uint8_t regad,
|
||||||
uint16_t *data);
|
uint16_t *data);
|
||||||
|
|
||||||
static inline int z_impl_mdio_read(const struct device *dev, uint8_t prtad,
|
static inline int z_impl_mdio_read(const struct device *dev, uint8_t prtad,
|
||||||
uint8_t devad, uint16_t *data)
|
uint8_t regad, uint16_t *data)
|
||||||
{
|
{
|
||||||
const struct mdio_driver_api *api =
|
const struct mdio_driver_api *api =
|
||||||
(const struct mdio_driver_api *)dev->api;
|
(const struct mdio_driver_api *)dev->api;
|
||||||
|
|
||||||
return api->read(dev, prtad, devad, data);
|
return api->read(dev, prtad, regad, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -126,23 +127,23 @@ static inline int z_impl_mdio_read(const struct device *dev, uint8_t prtad,
|
||||||
*
|
*
|
||||||
* @param[in] dev Pointer to the device structure for the controller
|
* @param[in] dev Pointer to the device structure for the controller
|
||||||
* @param[in] prtad Port address
|
* @param[in] prtad Port address
|
||||||
* @param[in] devad Device address
|
* @param[in] regad Register address
|
||||||
* @param[in] data Data to write
|
* @param[in] data Data to write
|
||||||
*
|
*
|
||||||
* @retval 0 If successful.
|
* @retval 0 If successful.
|
||||||
* @retval -EIO General input / output error.
|
* @retval -EIO General input / output error.
|
||||||
* @retval -ETIMEDOUT If transaction timedout on the bus
|
* @retval -ETIMEDOUT If transaction timedout on the bus
|
||||||
*/
|
*/
|
||||||
__syscall int mdio_write(const struct device *dev, uint8_t prtad, uint8_t devad,
|
__syscall int mdio_write(const struct device *dev, uint8_t prtad, uint8_t regad,
|
||||||
uint16_t data);
|
uint16_t data);
|
||||||
|
|
||||||
static inline int z_impl_mdio_write(const struct device *dev, uint8_t prtad,
|
static inline int z_impl_mdio_write(const struct device *dev, uint8_t prtad,
|
||||||
uint8_t devad, uint16_t data)
|
uint8_t regad, uint16_t data)
|
||||||
{
|
{
|
||||||
const struct mdio_driver_api *api =
|
const struct mdio_driver_api *api =
|
||||||
(const struct mdio_driver_api *)dev->api;
|
(const struct mdio_driver_api *)dev->api;
|
||||||
|
|
||||||
return api->write(dev, prtad, devad, data);
|
return api->write(dev, prtad, regad, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue