boards: renesas: Add minimal support for board RZ/V2L-SMARC

This adds minimal support for board RZ/V2L-SMARC

Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>

boards/renesas/rzv2l_smarc/Kconfig.rzv2l_smarc

@@ -0,0 +1,5 @@
+# Copyright (c) 2025 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_RZV2L_SMARC
+	select SOC_R9A07G054L23GBG

boards/renesas/rzv2l_smarc/board.cmake

@@ -0,0 +1,5 @@
+# Copyright (c) 2025 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=R9A07G054L23")
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/renesas/rzv2l_smarc/board.yml

@@ -0,0 +1,6 @@
+board:
+  name: rzv2l_smarc
+  full_name: RZ/V2L SMARC Evaluation Board Kit
+  vendor: renesas
+  socs:
+  - name: r9a07g054l23gbg

boards/renesas/rzv2l_smarc/doc/index.rst

@@ -0,0 +1,165 @@
+.. zephyr:board:: rzv2l_smarc
+
+Overview
+********
+
+The Renesas RZ/V2L SMARC Evaluation Board Kit (RZ/V2L-EVKIT) consists of a SMARC v2.1 module board and a carrier board.
+
+* Device: RZ/V2L R9A07G054L23GBG
+
+  * Cortex-A55 Dual, Cortex-M33
+  * BGA551pin, 15mmSq body, 0.5mm pitch
+
+* SMARC v2.1 Module Board Functions
+
+  * DDR4 SDRAM: 2GB x 1pc
+  * QSPI flash memory: 512Mb x 1pc
+  * eMMC memory: 64GB x 1pc
+  * The microSD card slot is implemented and used as an eSD for boot
+  * 5-output clock oscillator `5P35023 <https://www.renesas.com/en/products/clocks-timing/clock-generation/programmable-clocks/5p35023-versaclock-3s-programmable-clock-generator>`_ implemented
+  * PMIC power supply `RAA215300 <https://www.renesas.com/en/products/power-management/multi-channel-power-management-ics-pmics/raa215300-high-performance-9-channel-pmic-supporting-ddr-memory-built-charger-and-rtc>`_ implemented
+
+* Carrier Board Functions
+
+  * The FFC/FPC connector is mounted as standard for connection to high-speed serial interface for camera module.
+  * The Micro-HDMI connector via DSI/HDMI conversion module is mounted as standard for connection to high-speed serial interface for digital video module.
+  * The Micro-AB receptacle (ch0: USB2.0 OTG) and A receptacle (ch1: USB2.0 Host) are respectively mounted as standard for connection to USB interface.
+  * The RJ45 connector is mounted as standard for software development and evaluation using Ethernet.
+  * The audio codec is mounted as standard for advance development of audio system. The audio jack is implemented for connection to audio interface.
+  * The CAN connector is implemented for connection to CAN-Bus interface.
+  * The Micro-AB receptacles are implemented for connection to asynchronous serial port interface.
+  * The microSD card slot and two sockets for PMOD are implemented as an interface for RZ/V2L peripheral functions.
+  * For power supply, a mounted USB Type-C receptacle supports the USB PD standard.
+
+* MIPI Camera Module
+
+  * MIPI Camera Module (MIPI CSI) is included. Image recognition processing can be used with images input with MIPI camera.
+
+Hardware
+********
+
+The Renesas RZ/V2L MPU documentation can be found at `RZ/V2L Group Website`_
+
+.. figure:: rzv2l_block_diagram.webp
+	:width: 600px
+	:align: center
+	:alt: RZ/V2L group feature
+
+	RZ/V2L block diagram (Credit: Renesas Electronics Corporation)
+
+Detailed hardware features for the board can be found at `RZV2L-EVKIT Website`_
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+Programming and Debugging
+*************************
+
+Applications for the ``rzv2l_smarc`` board can be built in the usual way as
+documented in :ref:`build_an_application`.
+
+Console
+=======
+
+The UART port for Cortex-M33 System Core can be accessed by connecting `Pmod USBUART <https://store.digilentinc.com/pmod-usbuart-usb-to-uart-interface/>`_
+to the upper side of ``PMOD 1``.
+
+Debugging
+=========
+
+It is possible to load and execute a Zephyr application binary on
+this board on the Cortex-M33 System Core from
+the internal SRAM, using ``JLink`` debugger (:ref:`jlink-debug-host-tools`).
+
+Here is an example for building and debugging with the :zephyr:code-sample:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: rzv2l_smarc/r9a07g054l23gbg/cm33
+   :goals: build debug
+
+Flashing
+========
+
+RZ/V2L-EVKIT is designed to start different systems on different cores.
+It uses Yocto as the build system to build Linux system and boot loaders
+to run Zephyr on Cortex-M33 with u-boot. The minimal steps are described below.
+
+1. Follow ''2.2 Building Images'' of `SMARC EVK of RZ/V2L Linux Start-up Guide`_ to prepare the build environment.
+
+2. At step (4), follow step ''2. Download Multi-OS Package'' and ''3. Add the layer for Multi-OS Package''
+   of ''3.2 OpenAMP related stuff Integration for RZ/V2L'' of `RZ/V2L Quick Start Guide for RZ/V Multi-OS Package`_
+   to add the layer for Multi-OS Package.
+
+.. code-block:: console
+
+   $ cd ~/rzv_vlp_<pkg ver>
+   $ unzip <Multi-OS Dir>/r01an7254ej0300-rzv-multi-os-pkg.zip
+   $ tar zxvf r01an7254ej0300-rzv-multi-os-pkg/meta-rz-features_multi-os_v3.0.0.tar.gz
+   $ bitbake-layers add-layer ../meta-rz-features/meta-rz-multi-os/meta-rzv2l
+
+3. Start the build:
+
+.. code-block:: console
+
+   $ MACHINE=smarc-rzv2l bitbake core-image-minimal
+
+The below necessary artifacts will be located in the build/tmp/deploy/images
+
++---------------+------------------------------------------------------+
+| Artifacts     | File name                                            |
++===============+======================================================+
+| Boot loader   | bl2_bp-smarc-rzv2l_pmic.srec                         |
+|               |                                                      |
+|               | fip-smarc-rzv2l_pmic.srec                            |
++---------------+------------------------------------------------------+
+| Flash Writer  | Flash_Writer_SCIF_RZV2L_SMARC_PMIC_DDR4_2GB_1PCS.mot |
++---------------+------------------------------------------------------+
+
+4. Follow ''4.2 Startup Procedure'' of `SMARC EVK of RZ/V2L Linux Start-up Guide`_ for power supply and board setting
+   at SCIF download (SW11[1:4] = OFF, ON, OFF, ON) and (SW1[1:2] = ON, OFF)
+
+5. Follow ''4.3 Download Flash Writer to RAM'' of `SMARC EVK of RZ/V2L Linux Start-up Guide`_ to download Flash Writer to RAM
+
+6. Follow ''4.4 Write the Bootloader'' of `SMARC EVK of RZ/V2L Linux Start-up Guide`_ to write the boot loader
+   to the target board by using Flash Writer.
+
+7. Follow ''4.5 Change Back to Normal Boot Mode'' with switch setting (SW11[1:4] = OFF, OFF, OFF, ON) and (SW1[1:2] = ON, OFF)
+
+8. Follow ''3. Preparing the SD Card'' of `SMARC EVK of RZ/V2L Linux Start-up Guide`_ to write files to the microSD Card
+
+9. Copy zephyr.bin file to microSD card
+
+10. Follow "4.3.2 CM33 Sample Program Invocation with u-boot" from the beginning to step 4 of `RZ/V2L Quick Start Guide for RZ/V Multi-OS Package`_
+
+11. Execute the commands stated below on the console to start zephyr application with CM33 core.
+    Here, ''N'' stands for the partition number in which you stored zephyr.bin file.
+
+.. code-block:: console
+
+   Hit any key to stop autoboot: 2
+   => dcache off
+   => mmc dev 1
+   => fatload mmc 1:N 0x00010000 zephyr.bin
+   => fatload mmc 1:N 0x40010000 zephyr.bin
+   => cm33 start_normal 0x00010000 0x40010000
+   => dcache on
+
+References
+**********
+
+.. target-notes::
+
+.. _RZ/V2L Group Website:
+   https://www.renesas.com/en/products/microcontrollers-microprocessors/rz-mpus/rzv2l-general-purpose-microprocessor-equipped-renesas-original-ai-accelerator-drp-ai-12ghz-dual-core-arm
+
+.. _RZV2L-EVKIT Website:
+   https://www.renesas.com/en/products/microcontrollers-microprocessors/rz-mpus/rzv2l-evkit-smarc-som-evaluation-kit-rzv2l-mpu-ai-accelerator
+
+.. _SMARC EVK of RZ/V2L Linux Start-up Guide:
+   https://www.renesas.com/en/document/gde/smarc-evk-rzv2l-linux-start-guide-rev104
+
+.. _RZ/V2L Quick Start Guide for RZ/V Multi-OS Package:
+   https://www.renesas.com/en/document/apn/rzv2l-quick-start-guide-rzv-multi-os-package-v300

boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33.dts

@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2025 Renesas Electronics Corporation
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+#include <zephyr/dt-bindings/gpio/renesas-rz-gpio.h>
+#include <arm/renesas/rz/rzv/r9a07g054.dtsi>
+#include "rzv2l_smarc-pinctrl.dtsi"
+
+/ {
+	model = "Renesas RZ/V2L SMARC";
+	compatible = "renesas,rzv2l-smarc";
+
+	chosen {
+		zephyr,sram = &ddr;
+		zephyr,console = &scif2;
+		zephyr,shell-uart = &scif2;
+	};
+
+	ddr: memory@60010000 {
+		compatible = "mmio-sram";
+		reg = <0x60010000 DT_SIZE_M(46)>;
+	};
+};
+
+&scif2 {
+	current-speed = <115200>;
+	pinctrl-0 = <&scif2_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};

boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33.yaml

@@ -0,0 +1,11 @@
+identifier: rzv2l_smarc/r9a07g054l23gbg/cm33
+name: Cortex-M33 for Renesas RZ/V2L SMARC
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+supported:
+  - uart
+  - gpio
+vendor: renesas

boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33_defconfig

@@ -0,0 +1,11 @@
+# Copyright (c) 2025 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_XIP=n
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y