drivers/plic: Remove DTS fixups for RISC-V PLIC
Change the DT macros used by the RISC-V PLIC driver so that fixups are no longer required. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
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parent
3093f5cd2f
commit
627e27a25f
2 changed files with 10 additions and 26 deletions
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@ -42,7 +42,7 @@ void riscv_plic_irq_enable(u32_t irq)
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u32_t key;
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u32_t plic_irq = irq - RISCV_MAX_GENERIC_IRQ;
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volatile u32_t *en =
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(volatile u32_t *)DT_PLIC_IRQ_EN_BASE_ADDR;
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(volatile u32_t *)DT_RISCV_PLIC0_0_IRQ_EN_BASE_ADDRESS;
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key = irq_lock();
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en += (plic_irq >> 5);
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@ -68,7 +68,7 @@ void riscv_plic_irq_disable(u32_t irq)
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u32_t key;
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u32_t plic_irq = irq - RISCV_MAX_GENERIC_IRQ;
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volatile u32_t *en =
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(volatile u32_t *)DT_PLIC_IRQ_EN_BASE_ADDR;
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(volatile u32_t *)DT_RISCV_PLIC0_0_IRQ_EN_BASE_ADDRESS;
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key = irq_lock();
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en += (plic_irq >> 5);
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@ -88,7 +88,7 @@ void riscv_plic_irq_disable(u32_t irq)
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int riscv_plic_irq_is_enabled(u32_t irq)
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{
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volatile u32_t *en =
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(volatile u32_t *)DT_PLIC_IRQ_EN_BASE_ADDR;
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(volatile u32_t *)DT_RISCV_PLIC0_0_IRQ_EN_BASE_ADDRESS;
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u32_t plic_irq = irq - RISCV_MAX_GENERIC_IRQ;
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en += (plic_irq >> 5);
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@ -109,14 +109,14 @@ int riscv_plic_irq_is_enabled(u32_t irq)
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void riscv_plic_set_priority(u32_t irq, u32_t priority)
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{
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volatile u32_t *prio =
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(volatile u32_t *)DT_PLIC_PRIO_BASE_ADDR;
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(volatile u32_t *)DT_RISCV_PLIC0_0_PRIO_BASE_ADDRESS;
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/* Can set priority only for PLIC-specific interrupt line */
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if (irq <= RISCV_MAX_GENERIC_IRQ)
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return;
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if (priority > DT_PLIC_MAX_PRIORITY)
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priority = DT_PLIC_MAX_PRIORITY;
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if (priority > DT_RISCV_PLIC0_0_RISCV_MAX_PRIORITY)
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priority = DT_RISCV_PLIC0_0_RISCV_MAX_PRIORITY;
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prio += (irq - RISCV_MAX_GENERIC_IRQ);
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*prio = priority;
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@ -140,7 +140,7 @@ int riscv_plic_get_irq(void)
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static void plic_irq_handler(void *arg)
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{
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volatile struct plic_regs_t *regs =
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(volatile struct plic_regs_t *)DT_PLIC_REG_BASE_ADDR;
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(volatile struct plic_regs_t *) DT_RISCV_PLIC0_0_REG_BASE_ADDRESS;
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u32_t irq;
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struct _isr_table_entry *ite;
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@ -186,11 +186,11 @@ static int plic_init(struct device *dev)
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ARG_UNUSED(dev);
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volatile u32_t *en =
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(volatile u32_t *)DT_PLIC_IRQ_EN_BASE_ADDR;
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(volatile u32_t *)DT_RISCV_PLIC0_0_IRQ_EN_BASE_ADDRESS;
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volatile u32_t *prio =
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(volatile u32_t *)DT_PLIC_PRIO_BASE_ADDR;
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(volatile u32_t *)DT_RISCV_PLIC0_0_PRIO_BASE_ADDRESS;
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volatile struct plic_regs_t *regs =
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(volatile struct plic_regs_t *)DT_PLIC_REG_BASE_ADDR;
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(volatile struct plic_regs_t *)DT_RISCV_PLIC0_0_REG_BASE_ADDRESS;
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int i;
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/* Ensure that all interrupts are disabled initially */
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@ -1,16 +0,0 @@
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/*
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* Copyright (c) 2018 SiFive Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* PLIC */
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#define DT_PLIC_MAX_PRIORITY \
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DT_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY
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#define DT_PLIC_PRIO_BASE_ADDR \
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DT_RISCV_PLIC0_C000000_PRIO_BASE_ADDRESS
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#define DT_PLIC_IRQ_EN_BASE_ADDR \
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DT_RISCV_PLIC0_C000000_IRQ_EN_BASE_ADDRESS
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#define DT_PLIC_REG_BASE_ADDR \
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DT_RISCV_PLIC0_C000000_REG_BASE_ADDRESS
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