diff --git a/arch/arc/soc/quark_se_c1000_ss/soc.h b/arch/arc/soc/quark_se_c1000_ss/soc.h
index 5ef409b4662..35f62130a75 100644
--- a/arch/arc/soc/quark_se_c1000_ss/soc.h
+++ b/arch/arc/soc/quark_se_c1000_ss/soc.h
@@ -158,19 +158,6 @@
 /*
  * UART
  */
-
-#define UART_IRQ_FLAGS                                  0
-
-#define UART_NS16550_PORT_0_BASE_ADDR			0xB0002000
-#define UART_NS16550_PORT_0_IRQ				41
-#define UART_NS16550_PORT_0_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
-#define UART_NS16550_PORT_0_INT_MASK			0x460
-
-#define UART_NS16550_PORT_1_BASE_ADDR			0xB0002400
-#define UART_NS16550_PORT_1_IRQ				42
-#define UART_NS16550_PORT_1_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
-#define UART_NS16550_PORT_1_INT_MASK			0x464
-
 #define CONFIG_UART_QMSI_0_IRQ_FLAGS                     0
 #define CONFIG_UART_QMSI_1_IRQ_FLAGS                     0
 
diff --git a/arch/arc/soc/quark_se_c1000_ss/soc_config.c b/arch/arc/soc/quark_se_c1000_ss/soc_config.c
index 070efa54952..5899fe7e65b 100644
--- a/arch/arc/soc/quark_se_c1000_ss/soc_config.c
+++ b/arch/arc/soc/quark_se_c1000_ss/soc_config.c
@@ -42,26 +42,3 @@ DEVICE_INIT(ipm_console, "ipm_console", ipm_console_sender_init,
 
 #endif /* CONFIG_IPM_CONSOLE_SENDER */
 #endif /* CONFIG_IPM_QUARK_SE */
-
-#ifdef CONFIG_UART_NS16550
-
-static int uart_ns16550_init(struct device *dev)
-{
-	ARG_UNUSED(dev);
-
-#ifdef CONFIG_UART_NS16550_PORT_0
-	sys_clear_bit((SCSS_REGISTER_BASE + UART_NS16550_PORT_0_INT_MASK),
-		      INT_ENABLE_ARC_BIT_POS);
-#endif /* CONFIG_UART_NS16550_PORT_0 */
-
-#ifdef CONFIG_UART_NS16550_PORT_1
-	sys_clear_bit((SCSS_REGISTER_BASE + UART_NS16550_PORT_1_INT_MASK),
-		      INT_ENABLE_ARC_BIT_POS);
-#endif /* CONFIG_UART_NS16550_PORT_1 */
-
-	return 0;
-}
-
-SYS_INIT(uart_ns16550_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
-
-#endif /* CONFIG_UART_NS16550 */
diff --git a/arch/arc/soc/snps_emsk/dts.fixup b/arch/arc/soc/snps_emsk/dts.fixup
index 45a1b9c52d6..54761629b2c 100644
--- a/arch/arc/soc/snps_emsk/dts.fixup
+++ b/arch/arc/soc/snps_emsk/dts.fixup
@@ -9,32 +9,28 @@
 
 /*
  * UART configuration
- * BASE_ADDR, IRQ, CLK_FREQ are fixed, no need to fixup
  */
-#define UART_NS16550_PORT_0_BASE_ADDR		NS16550_F0008000_BASE_ADDRESS
-#define UART_NS16550_PORT_0_IRQ			NS16550_F0008000_IRQ_0
-#define UART_NS16550_PORT_0_CLK_FREQ		NS16550_F0008000_CLOCK_FREQUENCY
+#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR	NS16550_F0008000_BASE_ADDRESS
+#define CONFIG_UART_NS16550_PORT_0_IRQ		NS16550_F0008000_IRQ_0
+#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ	NS16550_F0008000_CLOCK_FREQUENCY
 #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE	NS16550_F0008000_CURRENT_SPEED
 #define CONFIG_UART_NS16550_PORT_0_NAME		NS16550_F0008000_LABEL
 #define CONFIG_UART_NS16550_PORT_0_IRQ_PRI	NS16550_F0008000_IRQ_0_PRIORITY
 
-
-#define UART_NS16550_PORT_1_BASE_ADDR		NS16550_F0009000_BASE_ADDRESS
-#define UART_NS16550_PORT_1_IRQ			NS16550_F0009000_IRQ_0
-#define UART_NS16550_PORT_1_CLK_FREQ		NS16550_F0009000_CLOCK_FREQUENCY
+#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR	NS16550_F0009000_BASE_ADDRESS
+#define CONFIG_UART_NS16550_PORT_1_IRQ		NS16550_F0009000_IRQ_0
+#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ	NS16550_F0009000_CLOCK_FREQUENCY
 #define CONFIG_UART_NS16550_PORT_1_BAUD_RATE	NS16550_F0009000_CURRENT_SPEED
 #define CONFIG_UART_NS16550_PORT_1_NAME		NS16550_F0009000_LABEL
 #define CONFIG_UART_NS16550_PORT_1_IRQ_PRI	NS16550_F0009000_IRQ_0_PRIORITY
 
-#define UART_NS16550_PORT_2_BASE_ADDR		NS16550_F000A000_BASE_ADDRESS
-#define UART_NS16550_PORT_2_IRQ			NS16550_F000A000_IRQ_0
-#define UART_NS16550_PORT_2_CLK_FREQ		NS16550_F000A000_CLOCK_FREQUENCY
+#define CONFIG_UART_NS16550_PORT_2_BASE_ADDR	NS16550_F000A000_BASE_ADDRESS
+#define CONFIG_UART_NS16550_PORT_2_IRQ		NS16550_F000A000_IRQ_0
+#define CONFIG_UART_NS16550_PORT_2_CLK_FREQ	NS16550_F000A000_CLOCK_FREQUENCY
 #define CONFIG_UART_NS16550_PORT_2_BAUD_RATE	NS16550_F000A000_CURRENT_SPEED
 #define CONFIG_UART_NS16550_PORT_2_NAME		NS16550_F000A000_LABEL
 #define CONFIG_UART_NS16550_PORT_2_IRQ_PRI	NS16550_F000A000_IRQ_0_PRIORITY
 
-#define UART_IRQ_FLAGS	0
-
 /*
  * I2C configuration
  */
diff --git a/arch/arc/soc/snps_emsk/soc.h b/arch/arc/soc/snps_emsk/soc.h
index 0874cb5dad0..f9f5a1954d9 100644
--- a/arch/arc/soc/snps_emsk/soc.h
+++ b/arch/arc/soc/snps_emsk/soc.h
@@ -54,6 +54,12 @@
 #define INT_ENABLE_ARC				~(0x00000001 << 8)
 #define INT_ENABLE_ARC_BIT_POS			(8)
 
+/*
+ * UARTs: UART0 & UART1 & UART2
+ */
+#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS	0 /* Default */
+#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS	0 /* Default */
+#define CONFIG_UART_NS16550_PORT_2_IRQ_FLAGS	0 /* Default */
 
 #ifndef CONFIG_HAS_DTS
 /* I2C */
@@ -103,20 +109,6 @@
  *  CS5   SPI-Flash (onboard)
  */
 
-/*
- * UARTs: UART0 & UART1 & UART2
- */
-#define UART_NS16550_PORT_0_BASE_ADDR		0xF0008000
-#define UART_NS16550_PORT_0_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_NS16550_PORT_1_BASE_ADDR		0xF0009000
-#define UART_NS16550_PORT_1_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_NS16550_PORT_2_BASE_ADDR		0xF000A000
-#define UART_NS16550_PORT_2_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_IRQ_FLAGS				0 /* Default */
-
 /**
  * Peripheral Interrupt Connection Configurations
  */
@@ -126,18 +118,12 @@
 #define CONFIG_I2C_1_IRQ			26
 #define SPI_DW_PORT_0_IRQ			27
 #define SPI_DW_PORT_1_IRQ			28
-#define UART_NS16550_PORT_0_IRQ			29
-#define UART_NS16550_PORT_1_IRQ			30
-#define UART_NS16550_PORT_2_IRQ			31
 #else /* CONFIG_BOARD_EM_STARTERKIT_R23 */
 #define GPIO_DW_0_IRQ				22
 #define CONFIG_I2C_0_IRQ			23
 #define CONFIG_I2C_1_IRQ			24
 #define SPI_DW_PORT_0_IRQ			25
 #define SPI_DW_PORT_1_IRQ			26
-#define UART_NS16550_PORT_0_IRQ			27
-#define UART_NS16550_PORT_1_IRQ			28
-#define UART_NS16550_PORT_2_IRQ			29
 #endif /* !CONFIG_BOARD_EM_STARTERKIT_R23 */
 
 #define GPIO_DW_1_IRQ				0	/* can't interrupt */
diff --git a/arch/arc/soc/snps_emsk/soc_config.c b/arch/arc/soc/snps_emsk/soc_config.c
index 0abe6a7e6ee..d80b4d0a6a8 100644
--- a/arch/arc/soc/snps_emsk/soc_config.c
+++ b/arch/arc/soc/snps_emsk/soc_config.c
@@ -19,12 +19,12 @@ static int uart_ns16550_init(struct device *dev)
 	 * send the UART the command to clear the interrupt
 	 */
 #ifdef CONFIG_UART_NS16550_PORT_0
-	sys_write32(0, UART_NS16550_PORT_0_BASE_ADDR+0x4);
-	sys_write32(0, UART_NS16550_PORT_0_BASE_ADDR+0x10);
+	sys_write32(0, CONFIG_UART_NS16550_PORT_0_BASE_ADDR+0x4);
+	sys_write32(0, CONFIG_UART_NS16550_PORT_0_BASE_ADDR+0x10);
 #endif /* CONFIG_UART_NS16550_PORT_0 */
 #ifdef CONFIG_UART_NS16550_PORT_1
-	sys_write32(0, UART_NS16550_PORT_1_BASE_ADDR+0x4);
-	sys_write32(0, UART_NS16550_PORT_1_BASE_ADDR+0x10);
+	sys_write32(0, CONFIG_UART_NS16550_PORT_1_BASE_ADDR+0x4);
+	sys_write32(0, CONFIG_UART_NS16550_PORT_1_BASE_ADDR+0x10);
 #endif /* CONFIG_UART_NS16550_PORT_1 */
 
 	return 0;
diff --git a/arch/nios2/soc/nios2f-zephyr/soc.h b/arch/nios2/soc/nios2f-zephyr/soc.h
index c52b3db5463..dcd232cda23 100644
--- a/arch/nios2/soc/nios2f-zephyr/soc.h
+++ b/arch/nios2/soc/nios2f-zephyr/soc.h
@@ -10,8 +10,8 @@
 
 #include <system.h>
 
-#define UART_NS16550_PORT_0_BASE_ADDR		A_16550_UART_0_BASE
-#define UART_NS16550_PORT_0_IRQ			A_16550_UART_0_IRQ
-#define UART_NS16550_PORT_0_CLK_FREQ		A_16550_UART_0_FREQ
+#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR	A_16550_UART_0_BASE
+#define CONFIG_UART_NS16550_PORT_0_IRQ		A_16550_UART_0_IRQ
+#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ	A_16550_UART_0_FREQ
 
 #endif
diff --git a/arch/riscv32/soc/pulpino/soc.h b/arch/riscv32/soc/pulpino/soc.h
index 52330b74706..3536bfc84d6 100644
--- a/arch/riscv32/soc/pulpino/soc.h
+++ b/arch/riscv32/soc/pulpino/soc.h
@@ -59,9 +59,11 @@
 #define SOC_ERET                   eret
 
 /* UART configuration */
-#define UART_NS16550_PORT_0_BASE_ADDR     0x1A100000
-#define UART_NS16550_PORT_0_CLK_FREQ      2500000
-#define UART_NS16550_PORT_0_IRQ           PULP_UART_0_IRQ
+#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR     0x1A100000
+#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ      2500000
+#define CONFIG_UART_NS16550_PORT_0_IRQ           PULP_UART_0_IRQ
+#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI       0
+#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS     0
 
 /* GPIO configuration */
 #define PULP_GPIO_0_BASE           0x1A101000
diff --git a/arch/x86/soc/atom/Kconfig.defconfig b/arch/x86/soc/atom/Kconfig.defconfig
index f63ff3926be..0ce5538dc8b 100644
--- a/arch/x86/soc/atom/Kconfig.defconfig
+++ b/arch/x86/soc/atom/Kconfig.defconfig
@@ -28,9 +28,6 @@ config UART_NS16550_PORT_0
 
 if UART_NS16550_PORT_0
 
-config UART_NS16550_PORT_0_IRQ_PRI
-	default 3
-
 config UART_NS16550_PORT_0_OPTIONS
 	default 0
 
@@ -41,9 +38,6 @@ config UART_NS16550_PORT_1
 
 if UART_NS16550_PORT_1
 
-config UART_NS16550_PORT_1_IRQ_PRI
-	default 3
-
 config UART_NS16550_PORT_1_OPTIONS
 	default 0
 
diff --git a/arch/x86/soc/atom/dts.fixup b/arch/x86/soc/atom/dts.fixup
index 10b8eccc90a..d653a85a4a4 100644
--- a/arch/x86/soc/atom/dts.fixup
+++ b/arch/x86/soc/atom/dts.fixup
@@ -1,12 +1,20 @@
 /* SoC level DTS fixup file */
 
-#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE	NS16550_F0009000_CURRENT_SPEED
+#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR	NS16550_000003F8_BASE_ADDRESS
+#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE	NS16550_000003F8_CURRENT_SPEED
+#define CONFIG_UART_NS16550_PORT_0_NAME		NS16550_000003F8_LABEL
+#define CONFIG_UART_NS16550_PORT_0_IRQ		NS16550_000003F8_IRQ_0
+#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI	NS16550_000003F8_IRQ_0_PRIORITY
+#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS	NS16550_000003F8_IRQ_0_SENSE
+#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ	NS16550_000003F8_CLOCK_FREQUENCY
 
-#define CONFIG_UART_NS16550_PORT_1_NAME		NS16550_F0009000_LABEL
-
-#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE	NS16550_F0008000_CURRENT_SPEED
-
-#define CONFIG_UART_NS16550_PORT_0_NAME		NS16550_F0008000_LABEL
+#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR	NS16550_000002F8_BASE_ADDRESS
+#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE	NS16550_000002F8_CURRENT_SPEED
+#define CONFIG_UART_NS16550_PORT_1_NAME		NS16550_000002F8_LABEL
+#define CONFIG_UART_NS16550_PORT_1_IRQ		NS16550_000002F8_IRQ_0
+#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI	NS16550_000002F8_IRQ_0_PRIORITY
+#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS	NS16550_000002F8_IRQ_0_SENSE
+#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ	NS16550_000002F8_CLOCK_FREQUENCY
 
 #define CONFIG_PHYS_RAM_ADDR			CONFIG_SRAM_BASE_ADDRESS
 
diff --git a/arch/x86/soc/atom/soc.h b/arch/x86/soc/atom/soc.h
index 341a9d860ab..190283423cf 100644
--- a/arch/x86/soc/atom/soc.h
+++ b/arch/x86/soc/atom/soc.h
@@ -29,19 +29,6 @@
  */
 #define UART_NS16550_ACCESS_IOPORT
 
-#define UART_NS16550_PORT_0_BASE_ADDR           0x03F8
-#define UART_NS16550_PORT_0_IRQ                 4
-#define UART_NS16550_PORT_0_CLK_FREQ            1843200
-
-#define UART_NS16550_PORT_1_BASE_ADDR           0x02F8
-#define UART_NS16550_PORT_1_IRQ                 3
-#define UART_NS16550_PORT_1_CLK_FREQ            1843200
-
-#ifdef CONFIG_IOAPIC
-#include <drivers/ioapic.h>
-#define UART_IRQ_FLAGS                          (IOAPIC_EDGE | IOAPIC_HIGH)
-#endif /* CONFIG_IOAPIC */
-
 
 /* PCI definitions */
 /* FIXME: The values below copied from generic ia32 soc, we need to get the
diff --git a/arch/x86/soc/ia32/Kconfig.defconfig b/arch/x86/soc/ia32/Kconfig.defconfig
index 88303bb03a1..1b6409f483f 100644
--- a/arch/x86/soc/ia32/Kconfig.defconfig
+++ b/arch/x86/soc/ia32/Kconfig.defconfig
@@ -28,8 +28,6 @@ config UART_NS16550_PORT_0
 
 if UART_NS16550_PORT_0
 
-config UART_NS16550_PORT_0_IRQ_PRI
-	default 3
 config UART_NS16550_PORT_0_OPTIONS
 	default 0
 
@@ -40,8 +38,6 @@ config UART_NS16550_PORT_1
 
 if UART_NS16550_PORT_1
 
-config UART_NS16550_PORT_1_IRQ_PRI
-	default 3
 config UART_NS16550_PORT_1_OPTIONS
 	default 0
 
diff --git a/arch/x86/soc/ia32/dts.fixup b/arch/x86/soc/ia32/dts.fixup
index 10ffa8a9fac..439b508b79e 100644
--- a/arch/x86/soc/ia32/dts.fixup
+++ b/arch/x86/soc/ia32/dts.fixup
@@ -1,12 +1,20 @@
 /* SoC level DTS fixup file */
 
-#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE	NS16550_F0009000_CURRENT_SPEED
+#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR	NS16550_000003F8_BASE_ADDRESS
+#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE	NS16550_000003F8_CURRENT_SPEED
+#define CONFIG_UART_NS16550_PORT_0_NAME		NS16550_000003F8_LABEL
+#define CONFIG_UART_NS16550_PORT_0_IRQ		NS16550_000003F8_IRQ_0
+#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI	NS16550_000003F8_IRQ_0_PRIORITY
+#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS	NS16550_000003F8_IRQ_0_SENSE
+#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ	NS16550_000003F8_CLOCK_FREQUENCY
 
-#define CONFIG_UART_NS16550_PORT_1_NAME		NS16550_F0009000_LABEL
-
-#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE	NS16550_F0008000_CURRENT_SPEED
-
-#define CONFIG_UART_NS16550_PORT_0_NAME		NS16550_F0008000_LABEL
+#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR	NS16550_000002F8_BASE_ADDRESS
+#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE	NS16550_000002F8_CURRENT_SPEED
+#define CONFIG_UART_NS16550_PORT_1_NAME		NS16550_000002F8_LABEL
+#define CONFIG_UART_NS16550_PORT_1_IRQ		NS16550_000002F8_IRQ_0
+#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI	NS16550_000002F8_IRQ_0_PRIORITY
+#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS	NS16550_000002F8_IRQ_0_SENSE
+#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ	NS16550_000002F8_CLOCK_FREQUENCY
 
 #define CONFIG_PHYS_RAM_ADDR			CONFIG_SRAM_BASE_ADDRESS
 
diff --git a/arch/x86/soc/ia32/soc.h b/arch/x86/soc/ia32/soc.h
index ee1ab577976..92ff737ba5f 100644
--- a/arch/x86/soc/ia32/soc.h
+++ b/arch/x86/soc/ia32/soc.h
@@ -27,20 +27,6 @@
  */
 #define UART_NS16550_ACCESS_IOPORT
 
-#define UART_NS16550_PORT_0_BASE_ADDR		0x03F8
-#define UART_NS16550_PORT_0_IRQ			4
-#define UART_NS16550_PORT_0_CLK_FREQ		1843200
-
-#define UART_NS16550_PORT_1_BASE_ADDR		0x02F8
-#define UART_NS16550_PORT_1_IRQ			3
-#define UART_NS16550_PORT_1_CLK_FREQ		1843200
-
-#ifdef CONFIG_IOAPIC
-#include <drivers/ioapic.h>
-#define UART_IRQ_FLAGS				(IOAPIC_EDGE | IOAPIC_HIGH)
-#endif /* CONFIG_IOAPIC */
-
-
 #define INT_VEC_IRQ0 0x20 /* Vector number for IRQ0 */
 /* PCI definitions */
 #define PCI_BUS_NUMBERS 1
diff --git a/arch/x86/soc/intel_quark/quark_x1000/Kconfig.defconfig.series b/arch/x86/soc/intel_quark/quark_x1000/Kconfig.defconfig.series
index ea96a1f5f8f..2b8389d8519 100644
--- a/arch/x86/soc/intel_quark/quark_x1000/Kconfig.defconfig.series
+++ b/arch/x86/soc/intel_quark/quark_x1000/Kconfig.defconfig.series
@@ -184,9 +184,6 @@ config UART_NS16550_PORT_0
 
 if UART_NS16550_PORT_0
 
-config UART_NS16550_PORT_0_IRQ_PRI
-	default 0
-
 config UART_NS16550_PORT_0_OPTIONS
 	default 0
 
@@ -200,9 +197,6 @@ config UART_NS16550_PORT_1
 
 if UART_NS16550_PORT_1
 
-config UART_NS16550_PORT_1_IRQ_PRI
-	default 3
-
 config UART_NS16550_PORT_1_OPTIONS
 	default 0
 
diff --git a/arch/x86/soc/intel_quark/quark_x1000/dts.fixup b/arch/x86/soc/intel_quark/quark_x1000/dts.fixup
index 660d7e5f0ce..cdad0f239ce 100644
--- a/arch/x86/soc/intel_quark/quark_x1000/dts.fixup
+++ b/arch/x86/soc/intel_quark/quark_x1000/dts.fixup
@@ -1,10 +1,18 @@
-#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE	NS16550_F0009000_CURRENT_SPEED
+#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR	NS16550_9000F000_BASE_ADDRESS
+#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE	NS16550_9000F000_CURRENT_SPEED
+#define CONFIG_UART_NS16550_PORT_0_NAME		NS16550_9000F000_LABEL
+#define CONFIG_UART_NS16550_PORT_0_IRQ		NS16550_9000F000_IRQ_0
+#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI	NS16550_9000F000_IRQ_0_PRIORITY
+#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS	NS16550_9000F000_IRQ_0_SENSE
+#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ	NS16550_9000F000_CLOCK_FREQUENCY
 
-#define CONFIG_UART_NS16550_PORT_1_NAME		NS16550_F0009000_LABEL
-
-#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE	NS16550_F0008000_CURRENT_SPEED
-
-#define CONFIG_UART_NS16550_PORT_0_NAME		NS16550_F0008000_LABEL
+#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR	NS16550_9000B000_BASE_ADDRESS
+#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE	NS16550_9000B000_CURRENT_SPEED
+#define CONFIG_UART_NS16550_PORT_1_NAME		NS16550_9000B000_LABEL
+#define CONFIG_UART_NS16550_PORT_1_IRQ		NS16550_9000B000_IRQ_0
+#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI	NS16550_9000B000_IRQ_0_PRIORITY
+#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS	NS16550_9000B000_IRQ_0_SENSE
+#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ	NS16550_9000B000_CLOCK_FREQUENCY
 
 #define CONFIG_PHYS_RAM_ADDR			CONFIG_SRAM_BASE_ADDRESS
 
diff --git a/arch/x86/soc/intel_quark/quark_x1000/soc.h b/arch/x86/soc/intel_quark/quark_x1000/soc.h
index a1b37e6346a..1821eecfaf4 100644
--- a/arch/x86/soc/intel_quark/quark_x1000/soc.h
+++ b/arch/x86/soc/intel_quark/quark_x1000/soc.h
@@ -105,10 +105,6 @@
 /*
  * UART
  */
-#define UART_NS16550_PORT_0_BASE_ADDR		0x9000f000
-#define UART_NS16550_PORT_0_IRQ			0
-#define UART_NS16550_PORT_0_CLK_FREQ		44236800
-
 #define UART_NS16550_PORT_0_PCI_CLASS		0x07
 #define UART_NS16550_PORT_0_PCI_BUS		0
 #define UART_NS16550_PORT_0_PCI_DEV		20
@@ -117,10 +113,6 @@
 #define UART_NS16550_PORT_0_PCI_FUNC		1
 #define UART_NS16550_PORT_0_PCI_BAR		0
 
-#define UART_NS16550_PORT_1_BASE_ADDR		0x9000b000
-#define UART_NS16550_PORT_1_IRQ			17
-#define UART_NS16550_PORT_1_CLK_FREQ		44236800
-
 #define UART_NS16550_PORT_1_PCI_CLASS		0x07
 #define UART_NS16550_PORT_1_PCI_BUS		0
 #define UART_NS16550_PORT_1_PCI_DEV		20
diff --git a/arch/xtensa/soc/intel_s1000/dts.fixup b/arch/xtensa/soc/intel_s1000/dts.fixup
index 15a2e10ff07..0f5cd4db0ec 100644
--- a/arch/xtensa/soc/intel_s1000/dts.fixup
+++ b/arch/xtensa/soc/intel_s1000/dts.fixup
@@ -1,8 +1,11 @@
 /* SoC level DTS fixup file */
 
+#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR	NS16550_80800_BASE_ADDRESS
 #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE	NS16550_80800_CURRENT_SPEED
-
 #define CONFIG_UART_NS16550_PORT_0_NAME		NS16550_80800_LABEL
+#define CONFIG_UART_NS16550_PORT_0_IRQ		NS16550_80800_IRQ_0
+#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI	NS16550_80800_IRQ_0_PRIORITY
+#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ	NS16550_808000_CLOCK_FREQUENCY
 
 #define L2_SRAM_BASE				CONFIG_SRAM_BASE_ADDRESS
 
diff --git a/arch/xtensa/soc/intel_s1000/soc.h b/arch/xtensa/soc/intel_s1000/soc.h
index 797ffd93143..1866813dbb8 100644
--- a/arch/xtensa/soc/intel_s1000/soc.h
+++ b/arch/xtensa/soc/intel_s1000/soc.h
@@ -60,12 +60,9 @@
 #define GPIO_DW_0_IRQ_ICTL_OFFSET		INTR_CNTL_IRQ_NUM(GPIO_DW_0_IRQ)
 
 /* UART - UART0 */
-#define UART_NS16550_PORT_0_BASE_ADDR		0x00080800
-#define UART_NS16550_PORT_0_CLK_FREQ		38400000
-#define UART_NS16550_PORT_0_IRQ			0x00030706
-#define UART_NS16550_P0_IRQ_ICTL_OFFSET		INTR_CNTL_IRQ_NUM(\
+#define CONFIG_UART_NS16550_P0_IRQ_ICTL_OFFSET	INTR_CNTL_IRQ_NUM(\
 						UART_NS16550_PORT_0_IRQ)
-#define UART_IRQ_FLAGS				0
+#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS	0
 
 /* I2C - I2C0 */
 #define I2C_DW_0_BASE_ADDR			0x00080400
diff --git a/drivers/serial/Kconfig.ns16550 b/drivers/serial/Kconfig.ns16550
index 43fa39c4361..fffb0ef5ecb 100644
--- a/drivers/serial/Kconfig.ns16550
+++ b/drivers/serial/Kconfig.ns16550
@@ -63,6 +63,7 @@ menuconfig UART_NS16550_PORT_0
 	help
 	  This tells the driver to configure the UART port at boot, depending on
 	  the additional configure options below.
+
 if !HAS_DTS
 config UART_NS16550_PORT_0_NAME
 	string "Port 0 Device Name"
@@ -71,7 +72,6 @@ config UART_NS16550_PORT_0_NAME
 	help
 	  This is the device name for UART, and is included in the device
 	  struct.
-endif
 
 if !HAS_DTS && !ARC
 config UART_NS16550_PORT_0_IRQ_PRI
@@ -82,7 +82,6 @@ config UART_NS16550_PORT_0_IRQ_PRI
 	  The interrupt priority for UART port.
 endif
 
-if !HAS_DTS
 config UART_NS16550_PORT_0_BAUD_RATE
 	int "Port 0 Baud Rate"
 	default 0
@@ -132,7 +131,6 @@ config UART_NS16550_PORT_1_NAME
 	help
 	  This is the device name for UART, and is included in the device
 	  struct.
-endif
 
 if !HAS_DTS && !ARC
 config UART_NS16550_PORT_1_IRQ_PRI
@@ -143,7 +141,6 @@ config UART_NS16550_PORT_1_IRQ_PRI
 	  The interrupt priority for UART port.
 endif
 
-if !HAS_DTS
 config UART_NS16550_PORT_1_BAUD_RATE
 	int "Port 1 Baud Rate"
 	default 0
diff --git a/drivers/serial/uart_ns16550.c b/drivers/serial/uart_ns16550.c
index c8565bbdc11..41088ad43ca 100644
--- a/drivers/serial/uart_ns16550.c
+++ b/drivers/serial/uart_ns16550.c
@@ -20,6 +20,7 @@
  *  UART_REG_ADDR_INTERVAL
  */
 
+#include <soc.h>
 #include <errno.h>
 
 #include <kernel.h>
@@ -749,7 +750,7 @@ static void irq_config_func_0(struct device *port);
 #endif
 
 static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_0 = {
-	.sys_clk_freq = UART_NS16550_PORT_0_CLK_FREQ,
+	.sys_clk_freq = CONFIG_UART_NS16550_PORT_0_CLK_FREQ,
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	.irq_config_func = irq_config_func_0,
@@ -767,7 +768,7 @@ static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_0 = {
 	.pci_dev.bar = UART_NS16550_PORT_0_PCI_BAR,
 #endif /* CONFIG_UART_NS16550_PORT_0_PCI */
 
-	.port = UART_NS16550_PORT_0_BASE_ADDR,
+	.port = CONFIG_UART_NS16550_PORT_0_BASE_ADDR,
 	.baud_rate = CONFIG_UART_NS16550_PORT_0_BAUD_RATE,
 	.options = CONFIG_UART_NS16550_PORT_0_OPTIONS,
 
@@ -786,11 +787,11 @@ static void irq_config_func_0(struct device *dev)
 {
 	ARG_UNUSED(dev);
 
-	IRQ_CONNECT(UART_NS16550_PORT_0_IRQ,
+	IRQ_CONNECT(CONFIG_UART_NS16550_PORT_0_IRQ,
 		    CONFIG_UART_NS16550_PORT_0_IRQ_PRI,
 		    uart_ns16550_isr, DEVICE_GET(uart_ns16550_0),
-		    UART_IRQ_FLAGS);
-	irq_enable(UART_NS16550_PORT_0_IRQ);
+		    CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS);
+	irq_enable(CONFIG_UART_NS16550_PORT_0_IRQ);
 }
 #endif
 
@@ -803,7 +804,7 @@ static void irq_config_func_1(struct device *port);
 #endif
 
 static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_1 = {
-	.sys_clk_freq = UART_NS16550_PORT_1_CLK_FREQ,
+	.sys_clk_freq = CONFIG_UART_NS16550_PORT_1_CLK_FREQ,
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	.irq_config_func = irq_config_func_1,
@@ -821,7 +822,7 @@ static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_1 = {
 	.pci_dev.bar = UART_NS16550_PORT_1_PCI_BAR,
 #endif /* CONFIG_UART_NS16550_PORT_1_PCI */
 
-	.port = UART_NS16550_PORT_1_BASE_ADDR,
+	.port = CONFIG_UART_NS16550_PORT_1_BASE_ADDR,
 	.baud_rate = CONFIG_UART_NS16550_PORT_1_BAUD_RATE,
 	.options = CONFIG_UART_NS16550_PORT_1_OPTIONS,
 
@@ -840,11 +841,11 @@ static void irq_config_func_1(struct device *dev)
 {
 	ARG_UNUSED(dev);
 
-	IRQ_CONNECT(UART_NS16550_PORT_1_IRQ,
+	IRQ_CONNECT(CONFIG_UART_NS16550_PORT_1_IRQ,
 		    CONFIG_UART_NS16550_PORT_1_IRQ_PRI,
 		    uart_ns16550_isr, DEVICE_GET(uart_ns16550_1),
-		    UART_IRQ_FLAGS);
-	irq_enable(UART_NS16550_PORT_1_IRQ);
+		    CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS);
+	irq_enable(CONFIG_UART_NS16550_PORT_1_IRQ);
 }
 #endif
 
diff --git a/dts/x86/atom.dtsi b/dts/x86/atom.dtsi
index dc36f9ecd4b..2ff2dc6718c 100644
--- a/dts/x86/atom.dtsi
+++ b/dts/x86/atom.dtsi
@@ -50,6 +50,7 @@
 			compatible = "ns16550";
 			reg = <0x000003f8 0x100>;
 			label = "UART_0";
+			clock-frequency = <1843200>;
 			interrupts = <4 IRQ_TYPE_EDGE_RISING 3>;
 			interrupt-parent = <&intc>;
 
@@ -60,6 +61,7 @@
 			compatible = "ns16550";
 			reg = <0x000002f8 0x100>;
 			label = "UART_1";
+			clock-frequency = <1843200>;
 			interrupts = <3 IRQ_TYPE_EDGE_RISING 3>;
 			interrupt-parent = <&intc>;
 
diff --git a/dts/x86/ia32.dtsi b/dts/x86/ia32.dtsi
index cc93a80f109..f76d26fd1fc 100644
--- a/dts/x86/ia32.dtsi
+++ b/dts/x86/ia32.dtsi
@@ -52,6 +52,7 @@
 			compatible = "ns16550";
 			reg = <0x000003f8 0x100>;
 			label = "UART_0";
+			clock-frequency = <1843200>;
 			interrupts = <4 IRQ_TYPE_EDGE_RISING 3>;
 			interrupt-parent = <&intc>;
 
@@ -62,6 +63,7 @@
 			compatible = "ns16550";
 			reg = <0x000002f8 0x100>;
 			label = "UART_1";
+			clock-frequency = <1843200>;
 			interrupts = <3 IRQ_TYPE_EDGE_RISING 3>;
 			interrupt-parent = <&intc>;
 
diff --git a/dts/x86/quark_x1000.dtsi b/dts/x86/quark_x1000.dtsi
index a31f73a2388..2ab05b9de28 100644
--- a/dts/x86/quark_x1000.dtsi
+++ b/dts/x86/quark_x1000.dtsi
@@ -51,6 +51,7 @@
 			compatible = "ns16550";
 			reg = <0x9000f000 0x400>;
 			label = "UART_0";
+			clock-frequency = <44236800>;
 			interrupts = <0 IRQ_TYPE_LEVEL_LOW 0>;
 			interrupt-parent = <&intc>;
 
@@ -61,6 +62,7 @@
 			compatible = "ns16550";
 			reg = <0x9000b000 0x400>;
 			label = "UART_1";
+			clock-frequency = <44236800>;
 			interrupts = <17 IRQ_TYPE_LEVEL_LOW 3>;
 			interrupt-parent = <&intc>;