michaelh/zephyr
1
0
Fork 0
Code Releases Activity

drivers: intc: plic: convert to DT_INST defines

Browse source 
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-02-18 07:55:12 -06:00 • committed by Kumar Gala
commit 61d30ed927
3 changed files with 15 additions and 24 deletions
Download patch file Download diff file Expand all files Collapse all files

25
drivers/interrupt_controller/intc_plic.c
View file

@ -17,6 +17,11 @@
#include <sw_isr_table.h>
#define PLIC_MAX_PRIO DT_INST_0_SIFIVE_PLIC_1_0_0_RISCV_MAX_PRIORITY
#define PLIC_PRIO DT_INST_0_SIFIVE_PLIC_1_0_0_PRIO_BASE_ADDRESS
#define PLIC_IRQ_EN DT_INST_0_SIFIVE_PLIC_1_0_0_IRQ_EN_BASE_ADDRESS
#define PLIC_REG DT_INST_0_SIFIVE_PLIC_1_0_0_REG_BASE_ADDRESS
#define PLIC_IRQS (CONFIG_NUM_IRQS - CONFIG_2ND_LVL_ISR_TBL_OFFSET)
#define PLIC_EN_SIZE ((PLIC_IRQS >> 5) + 1)
@ -42,7 +47,7 @@ static int save_irq;
void riscv_plic_irq_enable(u32_t irq)
{
u32_t key;
volatile u32_t *en = (volatile u32_t *)DT_PLIC_IRQ_EN;
volatile u32_t *en = (volatile u32_t *)PLIC_IRQ_EN;
key = irq_lock();
en += (irq >> 5);
@ -65,7 +70,7 @@ void riscv_plic_irq_enable(u32_t irq)
void riscv_plic_irq_disable(u32_t irq)
{
u32_t key;
volatile u32_t *en = (volatile u32_t *)DT_PLIC_IRQ_EN;
volatile u32_t *en = (volatile u32_t *)PLIC_IRQ_EN;
key = irq_lock();
en += (irq >> 5);
@ -84,7 +89,7 @@ void riscv_plic_irq_disable(u32_t irq)
*/
int riscv_plic_irq_is_enabled(u32_t irq)
{
volatile u32_t *en = (volatile u32_t *)DT_PLIC_IRQ_EN;
volatile u32_t *en = (volatile u32_t *)PLIC_IRQ_EN;
en += (irq >> 5);
return !!(*en & (1 << (irq & 31)));
@ -103,10 +108,10 @@ int riscv_plic_irq_is_enabled(u32_t irq)
*/
void riscv_plic_set_priority(u32_t irq, u32_t priority)
{
volatile u32_t *prio = (volatile u32_t *)DT_PLIC_PRIO;
volatile u32_t *prio = (volatile u32_t *)PLIC_PRIO;
if (priority > DT_PLIC_MAX_PRIO)
priority = DT_PLIC_MAX_PRIO;
if (priority > PLIC_MAX_PRIO)
priority = PLIC_MAX_PRIO;
prio += irq;
*prio = priority;
@ -130,7 +135,7 @@ int riscv_plic_get_irq(void)
static void plic_irq_handler(void *arg)
{
volatile struct plic_regs_t *regs =
(volatile struct plic_regs_t *) DT_PLIC_REG;
(volatile struct plic_regs_t *) PLIC_REG;
u32_t irq;
struct _isr_table_entry *ite;
@ -175,10 +180,10 @@ static int plic_init(struct device *dev)
{
ARG_UNUSED(dev);
volatile u32_t *en = (volatile u32_t *)DT_PLIC_IRQ_EN;
volatile u32_t *prio = (volatile u32_t *)DT_PLIC_PRIO;
volatile u32_t *en = (volatile u32_t *)PLIC_IRQ_EN;
volatile u32_t *prio = (volatile u32_t *)PLIC_PRIO;
volatile struct plic_regs_t *regs =
(volatile struct plic_regs_t *)DT_PLIC_REG;
(volatile struct plic_regs_t *)PLIC_REG;
int i;
/* Ensure that all interrupts are disabled initially */

7
soc/riscv/riscv-privilege/miv/dts_fixup.h
View file

@ -1,12 +1,5 @@
/* SPDX-License-Identifier: Apache-2.0 */
/* PLIC */
#define DT_PLIC_MAX_PRIO DT_SIFIVE_PLIC_1_0_0_40000000_RISCV_MAX_PRIORITY
#define DT_PLIC_PRIO DT_SIFIVE_PLIC_1_0_0_40000000_PRIO_BASE_ADDRESS
#define DT_PLIC_IRQ_EN DT_SIFIVE_PLIC_1_0_0_40000000_IRQ_EN_BASE_ADDRESS
#define DT_PLIC_REG DT_SIFIVE_PLIC_1_0_0_40000000_REG_BASE_ADDRESS
/* UART 0 */
#define DT_MIV_UART_0_BASE_ADDR DT_MICROSEMI_COREUART_70001000_BASE_ADDRESS
#define DT_MIV_UART_0_CLOCK_FREQUENCY DT_MICROSEMI_COREUART_70001000_CLOCK_FREQUENCY

7
soc/riscv/riscv-privilege/sifive-freedom/dts_fixup.h
View file

@ -1,7 +0,0 @@
/* SPDX-License-Identifier: Apache-2.0 */
/* Copyright (c) 2020 Olof Johansson <olof@lixom.net> */
#define DT_PLIC_MAX_PRIO DT_INST_0_SIFIVE_PLIC_1_0_0_RISCV_MAX_PRIORITY
#define DT_PLIC_PRIO DT_INST_0_SIFIVE_PLIC_1_0_0_PRIO_BASE_ADDRESS
#define DT_PLIC_IRQ_EN DT_INST_0_SIFIVE_PLIC_1_0_0_IRQ_EN_BASE_ADDRESS
#define DT_PLIC_REG DT_INST_0_SIFIVE_PLIC_1_0_0_REG_BASE_ADDRESS