stm32f4: Add STM32F413 Nucleo board
Add necessary board files, pinmux and device tree in order to have a usable debug console. Origin: Original Change-Id: I280320700352fd36a544c03f4e57d2eeec2449e5 Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
This commit is contained in:
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18 changed files with 349 additions and 0 deletions
10
boards/arm/nucleo_f413zh/Kconfig.board
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10
boards/arm/nucleo_f413zh/Kconfig.board
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# Kconfig - NUCLEO-144 F413ZH board configuration
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#
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# Copyright (c) 2017 Florian Vaussard, HEIG-VD
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config BOARD_NUCLEO_F413ZH
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bool "NUCLEO-144 F413ZH Development Board"
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depends on SOC_STM32F413XH
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13
boards/arm/nucleo_f413zh/Kconfig.defconfig
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boards/arm/nucleo_f413zh/Kconfig.defconfig
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# Kconfig - NUCLEO-144 F413ZH board configuration
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#
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# Copyright (c) 2017 Florian Vaussard, HEIG-VD
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if BOARD_NUCLEO_F413ZH
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config BOARD
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default nucleo_f413zh
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endif # BOARD_NUCLEO_F413ZH
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2
boards/arm/nucleo_f413zh/Makefile
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boards/arm/nucleo_f413zh/Makefile
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# No C files (yet)
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obj- += dummy.o
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43
boards/arm/nucleo_f413zh/board.h
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boards/arm/nucleo_f413zh/board.h
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/*
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* Copyright (c) 2017 Florian Vaussard, HEIG-VD
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*
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* Based on nucleo_f411re:
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*
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* Copyright (c) 2016 Matthias Boesl
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* Copyright (c) 2017 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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/* USER push button */
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#define USER_PB_GPIO_PORT "GPIOC"
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#define USER_PB_GPIO_PIN 13
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/* LD1 green LED */
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#define LD1_GPIO_PORT "GPIOB"
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#define LD1_GPIO_PIN 0
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/* LD2 blue LED */
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#define LD2_GPIO_PORT "GPIOB"
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#define LD2_GPIO_PIN 7
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/* LD3 red LED */
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#define LD3_GPIO_PORT "GPIOB"
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#define LD3_GPIO_PIN 14
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/* Create aliases to make the basic samples work */
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#define SW0_GPIO_NAME USER_PB_GPIO_PORT
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#define SW0_GPIO_PIN USER_PB_GPIO_PIN
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#define LED0_GPIO_PORT LD1_GPIO_PORT
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#define LED0_GPIO_PIN LD1_GPIO_PIN
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#define LED1_GPIO_PORT LD2_GPIO_PORT
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#define LED1_GPIO_PIN LD2_GPIO_PIN
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#define LED2_GPIO_PORT LD3_GPIO_PORT
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#define LED2_GPIO_PIN LD3_GPIO_PIN
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#endif /* __INC_BOARD_H */
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BIN
boards/arm/nucleo_f413zh/doc/img/Nucleo144_perf_logo_1024.jpg
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boards/arm/nucleo_f413zh/doc/img/Nucleo144_perf_logo_1024.jpg
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boards/arm/nucleo_f413zh/doc/img/Nucleo144_perf_logo_1024.png
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boards/arm/nucleo_f413zh/doc/img/Nucleo144_perf_logo_1024.png
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boards/arm/nucleo_f413zh/doc/img/nucleo_f412zg_morpho_left.png
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boards/arm/nucleo_f413zh/doc/img/nucleo_f412zg_morpho_left.png
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boards/arm/nucleo_f413zh/doc/img/nucleo_f412zg_morpho_right.png
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boards/arm/nucleo_f413zh/doc/img/nucleo_f412zg_morpho_right.png
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boards/arm/nucleo_f413zh/doc/img/nucleo_f412zg_zio_left.png
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boards/arm/nucleo_f413zh/doc/img/nucleo_f412zg_zio_left.png
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boards/arm/nucleo_f413zh/doc/img/nucleo_f412zg_zio_right.png
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boards/arm/nucleo_f413zh/doc/img/nucleo_f412zg_zio_right.png
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boards/arm/nucleo_f413zh/doc/nucleof413zh.rst
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boards/arm/nucleo_f413zh/doc/nucleof413zh.rst
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.. _nucleo_f413zh_board:
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ST Nucleo F413ZH
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################
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Overview
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********
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The Nucleo F413ZH board features an ARM Cortex-M4 based STM32F413ZH MCU
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with a wide range of connectivity support and configurations. Here are
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some highlights of the Nucleo F413ZH board:
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- STM32 microcontroller in LQFP144 package
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- Two types of extension resources:
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- ST Zio connector including: support for Arduino™ Uno V3 connectivity
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(A0 to A5, D0 to D15) and additional signals exposing a wide range of
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peripherals
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- ST morpho extension pin headers for full access to all STM32 I/Os
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- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
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- Flexible board power supply:
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- 5 V from ST-LINK/V2-1 USB VBUS
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- External power sources: 3.3 V and 7 - 12 V on ST Zio or ST morpho
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connectors, 5 V on ST morpho connector
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- Three user LEDs
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- Two push-buttons: USER and RESET
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.. image:: img/Nucleo144_perf_logo_1024.png
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:width: 720px
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:align: center
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:height: 720px
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:alt: Nucleo F413ZH
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More information about the board can be found at the `Nucleo F413ZH website`_.
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Hardware
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********
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Nucleo F413ZH provides the following hardware components:
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- STM32F413ZHT6 in LQFP144 package
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- ARM®32-bit Cortex®-M4 CPU with FPU
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- 100 MHz max CPU frequency
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- VDD from 1.7 V to 3.6 V
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- 1.5 MB Flash
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- 320 KB SRAM
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- GPIO with external interrupt capability
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- 2 12-bit ADC with 16 channels, with FIFO and burst support
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- RTC
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- 14 General purpose timers
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- 2 watchdog timers (independent and window)
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- SysTick timer
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- USART/UART (10)
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- I2C (4)
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- SPI (5)
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- SDIO
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- USB 2.0 OTG FS
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- DMA Controller
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- CRC calculation unit
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More information about STM32F413ZH can be found here:
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- `STM32F413ZH on www.st.com`_
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- `STM32F413/423 reference manual`_
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Supported Features
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==================
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The Zephyr nucleo_413zh board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig file:
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``boards/arm/nucleo_f413zh/nucleo_f413zh_defconfig``
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Connections and IOs
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===================
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Nucleo F413ZH Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
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input/output, pull-up, etc.
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Available pins:
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---------------
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.. image:: img/nucleo_f412zg_zio_left.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F413ZH ZIO connectors (left)
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.. image:: img/nucleo_f412zg_zio_right.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F413ZH ZIO connectors (right)
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.. image:: img/nucleo_f412zg_morpho_left.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F413ZH Morpho connectors (left)
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.. image:: img/nucleo_f412zg_morpho_right.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F413ZH Morpho connectors (right)
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For mode details please refer to `STM32 Nucleo-144 board User Manual`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- UART_3_TX : PD8
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- UART_3_RX : PD9
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- PWM_2_CH1 : PA0
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- USER_PB : PC13
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- LD1 : PB0
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- LD2 : PB7
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- LD3 : PB14
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System Clock
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------------
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Nucleo F413ZH System Clock could be driven by internal or external oscillator,
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as well as main PLL clock. By default System clock is driven by PLL clock at 96MHz,
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driven by 8MHz high speed external clock.
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Serial Port
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-----------
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Nucleo F413ZH board has 10 UARTs. The Zephyr console output is assigned to UART3.
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Default settings are 115200 8N1.
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Programming and Debugging
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*************************
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Nucleo F413ZH board includes an ST-LINK/V2-1 embedded debug tool interface.
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However this interface is currently not supported by openocd. You will need
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to use ST tools or an external JTAG probe.
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.. _Nucleo F413ZH website:
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http://www.st.com/en/evaluation-tools/nucleo-f413zh.html
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.. _STM32 Nucleo-144 board User Manual:
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http://www.st.com/resource/en/user_manual/dm00244518.pdf
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.. _STM32F413ZH on www.st.com:
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http://www.st.com/en/microcontrollers/stm32f413zh.html
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.. _STM32F413/423 reference manual:
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http://www.st.com/resource/en/reference_manual/dm00305666.pdf
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42
boards/arm/nucleo_f413zh/nucleo_f413zh_defconfig
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42
boards/arm/nucleo_f413zh/nucleo_f413zh_defconfig
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CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F413ZH=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F413XH=y
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# 96MHz system clock (highest value to get a precise USB clock)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
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CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
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# enable USART2 - passthrough to STLINK v2 connector
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CONFIG_UART_STM32_PORT_3=y
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# enable console on this port by default
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_3"
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# enable pinmux
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CONFIG_PINMUX=y
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# enable GPIO ports A, B, C
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CONFIG_GPIO=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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CONFIG_CLOCK_VDD_VOLTAGE=3300
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# Clock configuration for Cube Clock control driver
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CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# use HSE as PLL input
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CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
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# however, the board does not have an external oscillator, so just use
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# the 8MHz clock signal coming from integrated STLink
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CONFIG_CLOCK_STM32_HSE_BYPASS=y
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# produce 96MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=384
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=4
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=2
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CONFIG_CLOCK_STM32_APB2_PRESCALER=1
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#enable DTS
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CONFIG_HAS_DTS=y
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@ -12,6 +12,7 @@ obj-$(CONFIG_BOARD_NUCLEO_F334R8) += stm32/pinmux_board_nucleo_f334r8.o
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obj-$(CONFIG_BOARD_STM32373C_EVAL) += stm32/pinmux_board_stm32373c_eval.o
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obj-$(CONFIG_BOARD_STM32373C_EVAL) += stm32/pinmux_board_stm32373c_eval.o
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obj-$(CONFIG_BOARD_NUCLEO_F401RE) += stm32/pinmux_board_nucleo_f401re.o
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obj-$(CONFIG_BOARD_NUCLEO_F401RE) += stm32/pinmux_board_nucleo_f401re.o
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obj-$(CONFIG_BOARD_NUCLEO_F411RE) += stm32/pinmux_board_nucleo_f411re.o
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obj-$(CONFIG_BOARD_NUCLEO_F411RE) += stm32/pinmux_board_nucleo_f411re.o
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obj-$(CONFIG_BOARD_NUCLEO_F413ZH) += stm32/pinmux_board_nucleo_f413zh.o
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obj-$(CONFIG_BOARD_96B_CARBON) += stm32/pinmux_board_carbon.o
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obj-$(CONFIG_BOARD_96B_CARBON) += stm32/pinmux_board_carbon.o
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obj-$(CONFIG_BOARD_NUCLEO_L476RG) += stm32/pinmux_board_nucleo_l476rg.o
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obj-$(CONFIG_BOARD_NUCLEO_L476RG) += stm32/pinmux_board_nucleo_l476rg.o
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obj-$(CONFIG_BOARD_NUCLEO_L432KC) += stm32/pinmux_board_nucleo_l432kc.o
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obj-$(CONFIG_BOARD_NUCLEO_L432KC) += stm32/pinmux_board_nucleo_l432kc.o
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34
drivers/pinmux/stm32/pinmux_board_nucleo_f413zh.c
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34
drivers/pinmux/stm32/pinmux_board_nucleo_f413zh.c
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/*
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* Copyright (c) 2017 Florian Vaussard, HEIG-VD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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#include <pinmux.h>
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#include <sys_io.h>
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#include "pinmux/pinmux.h"
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#include "pinmux_stm32.h"
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/* pin assignments for NUCLEO-F413ZH board */
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static const struct pin_config pinconf[] = {
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#ifdef CONFIG_UART_STM32_PORT_3
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{STM32_PIN_PD8, STM32F4_PINMUX_FUNC_PD8_USART3_TX},
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{STM32_PIN_PD9, STM32F4_PINMUX_FUNC_PD9_USART3_RX},
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#endif /* #ifdef CONFIG_UART_STM32_PORT_3 */
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};
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static int pinmux_stm32_init(struct device *port)
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{
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ARG_UNUSED(port);
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stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
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return 0;
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}
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SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
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||||||
|
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
|
|
@ -16,6 +16,7 @@ dtb-$(CONFIG_BOARD_96B_CARBON) = 96b_carbon.dts_compiled
|
||||||
dtb-$(CONFIG_BOARD_96B_CARBON_NRF51) = 96b_carbon_nrf51.dts_compiled
|
dtb-$(CONFIG_BOARD_96B_CARBON_NRF51) = 96b_carbon_nrf51.dts_compiled
|
||||||
dtb-$(CONFIG_BOARD_NUCLEO_F401RE) = nucleo_f401re.dts_compiled
|
dtb-$(CONFIG_BOARD_NUCLEO_F401RE) = nucleo_f401re.dts_compiled
|
||||||
dtb-$(CONFIG_BOARD_NUCLEO_F411RE) = nucleo_f411re.dts_compiled
|
dtb-$(CONFIG_BOARD_NUCLEO_F411RE) = nucleo_f411re.dts_compiled
|
||||||
|
dtb-$(CONFIG_BOARD_NUCLEO_F413ZH) = nucleo_f413zh.dts_compiled
|
||||||
dtb-$(CONFIG_BOARD_NUCLEO_F103RB) = nucleo_f103rb.dts_compiled
|
dtb-$(CONFIG_BOARD_NUCLEO_F103RB) = nucleo_f103rb.dts_compiled
|
||||||
dtb-$(CONFIG_BOARD_STM3210C_EVAL) = stm3210c_eval.dts_compiled
|
dtb-$(CONFIG_BOARD_STM3210C_EVAL) = stm3210c_eval.dts_compiled
|
||||||
dtb-$(CONFIG_BOARD_STM32_MINI_A15) = stm32_mini_a15.dts_compiled
|
dtb-$(CONFIG_BOARD_STM32_MINI_A15) = stm32_mini_a15.dts_compiled
|
||||||
|
|
24
dts/arm/nucleo_f413zh.dts
Normal file
24
dts/arm/nucleo_f413zh.dts
Normal file
|
@ -0,0 +1,24 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2017 Florian Vaussard, HEIG-VD
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include <st/stm32f413.dtsi>
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "STMicroelectronics STM32F413ZH-NUCLEO board";
|
||||||
|
compatible = "st,stm32f413zh-nucleo", "st,stm32f413";
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
zephyr,console = &usart3;
|
||||||
|
zephyr,sram = &sram0;
|
||||||
|
zephyr,flash = &flash0;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&usart3 {
|
||||||
|
current-speed = <115200>;
|
||||||
|
status = "ok";
|
||||||
|
};
|
13
dts/arm/nucleo_f413zh.fixup
Normal file
13
dts/arm/nucleo_f413zh.fixup
Normal file
|
@ -0,0 +1,13 @@
|
||||||
|
/* This file is a temporary workaround for mapping of the generated information
|
||||||
|
* to the current driver definitions. This will be removed when the drivers
|
||||||
|
* are modified to handle the generated information, or the mapping of
|
||||||
|
* generated data matches the driver definitions.
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||||
|
|
||||||
|
#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS
|
||||||
|
#define CONFIG_UART_STM32_PORT_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED
|
||||||
|
#define CONFIG_UART_STM32_PORT_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY
|
||||||
|
#define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0
|
|
@ -8,6 +8,7 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
|
||||||
stm3210c_eval nucleo_f334r8 stm32373c_eval mps2_an385 frdm_kw41z
|
stm3210c_eval nucleo_f334r8 stm32373c_eval mps2_an385 frdm_kw41z
|
||||||
sam_e70_xplained curie_ble nrf52_blenano2 hexiwear_kw40z
|
sam_e70_xplained curie_ble nrf52_blenano2 hexiwear_kw40z
|
||||||
cc3220sf_launchxl frdm_kl25z disco_l475_iot1 nucleo_l432kc
|
cc3220sf_launchxl frdm_kl25z disco_l475_iot1 nucleo_l432kc
|
||||||
|
nucleo_f413zh
|
||||||
|
|
||||||
supported_toolchains = zephyr gccarmemb
|
supported_toolchains = zephyr gccarmemb
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue