x86: add API for modifying page tables
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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parent
bc666ae7f7
commit
6101aa6220
2 changed files with 73 additions and 16 deletions
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@ -159,3 +159,46 @@ int _x86_mmu_buffer_validate(void *addr, size_t size, int flags)
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}
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return status;
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}
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static inline void tlb_flush_page(void *addr)
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{
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/* Invalidate TLB entries corresponding to the page containing the
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* specified address
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*/
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char *page = (char *)addr;
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__asm__ ("invlpg %0" :: "m" (*page));
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}
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void _x86_mmu_set_flags(void *ptr, size_t size, u32_t flags, u32_t mask)
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{
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int pde_index, pte_index;
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union x86_mmu_pde *pde;
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union x86_mmu_pte *pte;
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struct x86_mmu_page_table *pt;
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u32_t addr = (u32_t)ptr;
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__ASSERT(!(addr & MMU_PAGE_MASK), "unaligned address provided");
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__ASSERT(!(size & MMU_PAGE_MASK), "unaligned size provided");
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while (size) {
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pde_index = MMU_PDE_NUM(addr);
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pde = &X86_MMU_PD->entry[pde_index];
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/* TODO we're not generating 4MB entries at the moment */
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__ASSERT(pde->fourmb.ps != 1, "4MB PDE found");
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pt = (struct x86_mmu_page_table *)(pde->pt.page_table << 12);
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pte_index = MMU_PAGE_NUM(addr);
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pte = &pt->entry[pte_index];
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pte->value = (pte->value & ~mask) | flags;
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tlb_flush_page((void *)addr);
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size -= MMU_PAGE_SIZE;
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addr += MMU_PAGE_SIZE;
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}
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}
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@ -457,22 +457,6 @@ extern void _arch_irq_enable(unsigned int irq);
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*/
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extern void _arch_irq_disable(unsigned int irq);
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/**
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* @brief check page table entry flags
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*
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* This routine checks if the buffer is avaialable to the whoever calls
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* this API.
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* @param addr start address of the buffer
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* @param size the size of the buffer
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* @param flags permisions to check.
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* Consists of 2 bits the bit0 represents the RW permissions
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* The bit1 represents the user/supervisor permissions
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* Use macro BUFF_READABLE/BUFF_WRITEABLE or BUFF_USER to build the flags
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*
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* @return true-if the permissions of the pde matches the request
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*/
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int _x86_mmu_buffer_validate(void *addr, size_t size, int flags);
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/**
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* @defgroup float_apis Floating Point APIs
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* @ingroup kernel_apis
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@ -587,6 +571,36 @@ extern u32_t __mmu_tables_start;
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#define X86_MMU_PD ((struct x86_mmu_page_directory *)\
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(void *)&__mmu_tables_start)
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/**
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* @brief set flags in the MMU page tables
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*
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* Modify bits in the existing page tables for a particular memory
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* range, which must be page-aligned
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*
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* @param ptr Starting memory address which must be page-aligned
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* @param size Size of the region, must be page size multiple
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* @flags Value of bits to set in the page table entries
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* @mask Mask indicating which particular bits in the page table entries to
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* modify
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*/
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void _x86_mmu_set_flags(void *ptr, size_t size, u32_t flags, u32_t mask);
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/**
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* @brief check page table entry flags
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*
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* This routine checks if the buffer is avaialable to the whoever calls
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* this API.
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* @param addr start address of the buffer
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* @param size the size of the buffer
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* @param flags permisions to check.
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* Consists of 2 bits the bit0 represents the RW permissions
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* The bit1 represents the user/supervisor permissions
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* Use macro BUFF_READABLE/BUFF_WRITEABLE or BUFF_USER to build the flags
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*
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* @return true-if the permissions of the pde matches the request
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*/
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int _x86_mmu_buffer_validate(void *addr, size_t size, int flags);
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#endif /* CONFIG_X86_MMU */
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#endif /* !_ASMLANGUAGE */
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