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arch: Use dts to set i2c priorities for quark_se/quark_d2000

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Fix the qmsi i2c driver and the relevant SoCs accordingly.
Also applying relevant changes on quark_se_c1000_ss as it can use i2c
qmsi driver as well along with qmsi ss i2c driver.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2018-03-06 07:28:04 +01:00 • committed by Anas Nashif
commit 60d509f3d7
8 changed files with 22 additions and 58 deletions
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6
arch/arc/soc/quark_se_c1000_ss/Kconfig.defconfig
View file

@ -91,15 +91,9 @@ if I2C_QMSI
config I2C_0
def_bool y
config I2C_0_IRQ_PRI
default 1
config I2C_1
def_bool y
config I2C_1_IRQ_PRI
default 1
config I2C_SDA_SETUP
default 2

4
arch/arc/soc/quark_se_c1000_ss/dts.fixup
View file

@ -42,8 +42,12 @@
#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL
#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ INTEL_QMSI_I2C_B0002800_IRQ_0
#define CONFIG_I2C_0_IRQ_PRI INTEL_QMSI_I2C_B0002800_IRQ_0_PRIORITY
#define CONFIG_I2C_1_NAME INTEL_QMSI_I2C_B0002C00_LABEL
#define CONFIG_I2C_1_BITRATE INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
#define CONFIG_I2C_1_IRQ INTEL_QMSI_I2C_B0002C00_IRQ_0
#define CONFIG_I2C_1_IRQ_PRI INTEL_QMSI_I2C_B0002C00_IRQ_0_PRIORITY
#define CONFIG_RTC_0_NAME INTEL_QMSI_RTC_B0000400_LABEL
#define CONFIG_RTC_0_IRQ INTEL_QMSI_RTC_B0000400_IRQ_0

4
arch/arc/soc/quark_se_c1000_ss/soc.h
View file

@ -132,6 +132,10 @@
#define I2C_SS_1_STOP_VECTOR 29
#define I2C_SS_1_STOP_MASK 0x42C
#define CONFIG_I2C_0_IRQ_FLAGS (IOAPIC_LEVEL | IOAPIC_HIGH)
#define CONFIG_I2C_1_IRQ_FLAGS (IOAPIC_LEVEL | IOAPIC_HIGH)
/*
* GPIO
*/

2
arch/x86/soc/intel_quark/quark_d2000/dts.fixup
View file

@ -18,6 +18,8 @@
#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL
#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ INTEL_QMSI_I2C_B0002800_IRQ_0
#define CONFIG_I2C_0_IRQ_FLAGS INTEL_QMSI_I2C_B0002800_IRQ_0_SENSE
#define CONFIG_GPIO_QMSI_0_NAME INTEL_QMSI_GPIO_B0000C00_LABEL
#define CONFIG_GPIO_QMSI_0_IRQ INTEL_QMSI_GPIO_B0000C00_IRQ_0

14
arch/x86/soc/intel_quark/quark_se/Kconfig.defconfig.series
View file

@ -62,23 +62,9 @@ config I2C_QMSI
config I2C_0
def_bool y
if I2C_0
config I2C_0_IRQ_PRI
default 2
endif # I2C_0
config I2C_1
def_bool y
if I2C_1
config I2C_1_IRQ_PRI
default 2
endif # I2C_1
config I2C_SDA_SETUP
default 2

6
arch/x86/soc/intel_quark/quark_se/dts.fixup
View file

@ -24,8 +24,14 @@
#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL
#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ INTEL_QMSI_I2C_B0002800_IRQ_0
#define CONFIG_I2C_0_IRQ_PRI INTEL_QMSI_I2C_B0002800_IRQ_0_PRIORITY
#define CONFIG_I2C_0_IRQ_FLAGS INTEL_QMSI_I2C_B0002800_IRQ_0_SENSE
#define CONFIG_I2C_1_NAME INTEL_QMSI_I2C_B0002C00_LABEL
#define CONFIG_I2C_1_BITRATE INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
#define CONFIG_I2C_1_IRQ INTEL_QMSI_I2C_B0002C00_IRQ_0
#define CONFIG_I2C_1_IRQ_PRI INTEL_QMSI_I2C_B0002C00_IRQ_0_PRIORITY
#define CONFIG_I2C_1_IRQ_FLAGS INTEL_QMSI_I2C_B0002C00_IRQ_0_SENSE
#define CONFIG_GPIO_QMSI_0_NAME INTEL_QMSI_GPIO_B0000C00_LABEL
#define CONFIG_GPIO_QMSI_0_IRQ INTEL_QMSI_GPIO_B0000C00_IRQ_0

32
drivers/i2c/Kconfig.qmsi
View file

@ -53,42 +53,10 @@ config I2C_SS_0
bool "Enable I2C_SS_0"
default n
config I2C_SS_0_NAME
string "Select a name for finding the device"
depends on I2C_SS_0 && !HAS_DTS_I2C
default "I2C_SS_0"
config I2C_SS_0_BITRATE
hex "I2C SS 0 default bitrate"
depends on I2C_SS_0 && !HAS_DTS_I2C
default 0x0
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C datasheet for proper values.
config I2C_SS_1
bool "Enable I2C SS Port 1"
default n
config I2C_SS_1_NAME
string "Select a name for finding the device"
depends on I2C_SS_1 && !HAS_DTS_I2C
default "I2C_SS_1"
config I2C_SS_1_BITRATE
hex "I2C SS 1 default bitrate"
depends on I2C_SS_1 && !HAS_DTS_I2C
default 0x0
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C datasheet for proper values.
config I2C_SS_SDA_HOLD
int
help

12
drivers/i2c/i2c_qmsi.c
View file

@ -271,20 +271,20 @@ static int i2c_qmsi_init(struct device *dev)
/* Register interrupt handler, unmask IRQ and route it
* to Lakemont core.
*/
IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_I2C_0_INT),
IRQ_CONNECT(CONFIG_I2C_0_IRQ,
CONFIG_I2C_0_IRQ_PRI, qm_i2c_0_irq_isr, NULL,
(IOAPIC_LEVEL | IOAPIC_HIGH));
irq_enable(IRQ_GET_NUMBER(QM_IRQ_I2C_0_INT));
CONFIG_I2C_0_IRQ_FLAGS);
irq_enable(CONFIG_I2C_0_IRQ);
QM_IR_UNMASK_INTERRUPTS(
QM_INTERRUPT_ROUTER->i2c_master_0_int_mask);
break;
#ifdef CONFIG_I2C_1
case QM_I2C_1:
IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_I2C_1_INT),
IRQ_CONNECT(CONFIG_I2C_1_IRQ,
CONFIG_I2C_1_IRQ_PRI, qm_i2c_1_irq_isr, NULL,
(IOAPIC_LEVEL | IOAPIC_HIGH));
irq_enable(IRQ_GET_NUMBER(QM_IRQ_I2C_1_INT));
CONFIG_I2C_1_IRQ_FLAGS);
irq_enable(CONFIG_I2C_1_IRQ);
QM_IR_UNMASK_INTERRUPTS(
QM_INTERRUPT_ROUTER->i2c_master_1_int_mask);
break;