drivers: dma: irq handler of the dma_stm32

define the irq handler in case of DMA V1 or V2,
for the stm32x soc series
with DMA V1 raise Fifo Error if enabled
with V2, handle the Global Interrupt

Signed-off-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Francois Ramu 2020-03-11 09:45:08 +01:00 committed by Kumar Gala
commit 60644a3e2c
3 changed files with 10 additions and 7 deletions

View file

@ -16,7 +16,7 @@ struct dma_stm32_stream {
bool busy; bool busy;
u32_t src_size; u32_t src_size;
u32_t dst_size; u32_t dst_size;
void *callback_arg; void *callback_arg; /* holds the client data */
void (*dma_callback)(void *arg, u32_t id, void (*dma_callback)(void *arg, u32_t id,
int error_code); int error_code);
}; };
@ -47,6 +47,10 @@ extern u32_t (*func_ll_is_active_tc[])(DMA_TypeDef *DMAx);
extern void (*func_ll_clear_tc[])(DMA_TypeDef *DMAx); extern void (*func_ll_clear_tc[])(DMA_TypeDef *DMAx);
extern u32_t (*func_ll_is_active_ht[])(DMA_TypeDef *DMAx); extern u32_t (*func_ll_is_active_ht[])(DMA_TypeDef *DMAx);
extern void (*func_ll_clear_ht[])(DMA_TypeDef *DMAx); extern void (*func_ll_clear_ht[])(DMA_TypeDef *DMAx);
#ifdef CONFIG_DMA_STM32_V2
extern u32_t (*func_ll_is_active_gi[])(DMA_TypeDef *DMAx);
extern void (*func_ll_clear_gi[])(DMA_TypeDef *DMAx);
#endif
#ifdef CONFIG_DMA_STM32_V1 #ifdef CONFIG_DMA_STM32_V1
extern u32_t table_ll_channel[]; extern u32_t table_ll_channel[];
#endif #endif
@ -58,6 +62,7 @@ bool stm32_dma_is_unexpected_irq_happened(DMA_TypeDef *dma, u32_t id);
void stm32_dma_enable_stream(DMA_TypeDef *dma, u32_t id); void stm32_dma_enable_stream(DMA_TypeDef *dma, u32_t id);
int stm32_dma_disable_stream(DMA_TypeDef *dma, u32_t id); int stm32_dma_disable_stream(DMA_TypeDef *dma, u32_t id);
void stm32_dma_config_channel_function(DMA_TypeDef *dma, u32_t id, u32_t slot); void stm32_dma_config_channel_function(DMA_TypeDef *dma, u32_t id, u32_t slot);
#ifdef CONFIG_DMA_STM32_V1 #ifdef CONFIG_DMA_STM32_V1
void stm32_dma_disable_fifo_irq(DMA_TypeDef *dma, u32_t id); void stm32_dma_disable_fifo_irq(DMA_TypeDef *dma, u32_t id);
bool stm32_dma_check_fifo_mburst(LL_DMA_InitTypeDef *DMAx); bool stm32_dma_check_fifo_mburst(LL_DMA_InitTypeDef *DMAx);

View file

@ -169,7 +169,7 @@ void stm32_dma_clear_stream_irq(DMA_TypeDef *dma, u32_t id)
bool stm32_dma_is_irq_happened(DMA_TypeDef *dma, u32_t id) bool stm32_dma_is_irq_happened(DMA_TypeDef *dma, u32_t id)
{ {
if (func_ll_is_active_fe[id](dma)) { if (func_ll_is_active_fe[id](dma) && LL_DMA_IsEnabledIT_FE(dma, id)) {
return true; return true;
} }
@ -178,7 +178,7 @@ bool stm32_dma_is_irq_happened(DMA_TypeDef *dma, u32_t id)
bool stm32_dma_is_unexpected_irq_happened(DMA_TypeDef *dma, u32_t id) bool stm32_dma_is_unexpected_irq_happened(DMA_TypeDef *dma, u32_t id)
{ {
if (func_ll_is_active_fe[id](dma)) { if (func_ll_is_active_fe[id](dma) && LL_DMA_IsEnabledIT_FE(dma, id)) {
LOG_ERR("FiFo error."); LOG_ERR("FiFo error.");
stm32_dma_dump_stream_irq(dma, id); stm32_dma_dump_stream_irq(dma, id);
stm32_dma_clear_stream_irq(dma, id); stm32_dma_clear_stream_irq(dma, id);

View file

@ -117,7 +117,7 @@ static void (*func_ll_clear_te[])(DMA_TypeDef *DMAx) = {
#endif /* LL_DMA_IFCR_CTEIF8 */ #endif /* LL_DMA_IFCR_CTEIF8 */
}; };
static void (*func_ll_clear_gi[])(DMA_TypeDef *DMAx) = { void (*func_ll_clear_gi[])(DMA_TypeDef *DMAx) = {
LL_DMA_ClearFlag_GI1, LL_DMA_ClearFlag_GI1,
LL_DMA_ClearFlag_GI2, LL_DMA_ClearFlag_GI2,
LL_DMA_ClearFlag_GI3, LL_DMA_ClearFlag_GI3,
@ -152,7 +152,7 @@ static u32_t (*func_ll_is_active_te[])(DMA_TypeDef *DMAx) = {
}; };
static u32_t (*func_ll_is_active_gi[])(DMA_TypeDef *DMAx) = { u32_t (*func_ll_is_active_gi[])(DMA_TypeDef *DMAx) = {
LL_DMA_IsActiveFlag_GI1, LL_DMA_IsActiveFlag_GI1,
LL_DMA_IsActiveFlag_GI2, LL_DMA_IsActiveFlag_GI2,
LL_DMA_IsActiveFlag_GI3, LL_DMA_IsActiveFlag_GI3,
@ -182,7 +182,6 @@ void stm32_dma_dump_stream_irq(DMA_TypeDef *dma, u32_t id)
void stm32_dma_clear_stream_irq(DMA_TypeDef *dma, u32_t id) void stm32_dma_clear_stream_irq(DMA_TypeDef *dma, u32_t id)
{ {
func_ll_clear_te[id](dma); func_ll_clear_te[id](dma);
func_ll_clear_gi[id](dma);
} }
bool stm32_dma_is_irq_happened(DMA_TypeDef *dma, u32_t id) bool stm32_dma_is_irq_happened(DMA_TypeDef *dma, u32_t id)
@ -207,7 +206,6 @@ void stm32_dma_enable_stream(DMA_TypeDef *dma, u32_t id)
int stm32_dma_disable_stream(DMA_TypeDef *dma, u32_t id) int stm32_dma_disable_stream(DMA_TypeDef *dma, u32_t id)
{ {
if (!LL_DMA_IsEnabledChannel(dma, table_ll_stream[id])) { if (!LL_DMA_IsEnabledChannel(dma, table_ll_stream[id])) {
return 0; return 0;
} }