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dts: v2m_beetle: Generate Uart base addr

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This patch enables the generation of the ARM CMSDK UART base address
from the device tree.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This commit is contained in:
Vincenzo Frascino 2017-05-11 11:12:47 +01:00 • committed by Kumar Gala
commit 603c826fa4
4 changed files with 5 additions and 12 deletions
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4
arch/arm/soc/arm/beetle/soc.h
View file

@ -113,10 +113,6 @@
/* CMSDK APB Dual Timer */ /* CMSDK APB Dual Timer */
#define CMSDK_APB_DTIMER _BEETLE_DTIMER_BASE #define CMSDK_APB_DTIMER _BEETLE_DTIMER_BASE
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
#define CMSDK_APB_UART0 _BEETLE_UART0_BASE
#define CMSDK_APB_UART1 _BEETLE_UART1_BASE
/* CMSDK APB Watchdog */ /* CMSDK APB Watchdog */
#define CMSDK_APB_WDOG _BEETLE_WDOG_BASE #define CMSDK_APB_WDOG _BEETLE_WDOG_BASE

6
arch/arm/soc/arm/beetle/soc_irq.h
View file

@ -57,12 +57,6 @@
#define IRQ_PORT3_ALL 43 /* GPIO Port 3 combined Interrupt */ #define IRQ_PORT3_ALL 43 /* GPIO Port 3 combined Interrupt */
#define IRQ_TRNG 44 /* Random number generator Interrupt */ #define IRQ_TRNG 44 /* Random number generator Interrupt */
#ifndef CONFIG_HAS_DTS
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
#define CMSDK_APB_UART_0_IRQ IRQ_UART0
#define CMSDK_APB_UART_1_IRQ IRQ_UART1
#endif
/* CMSDK APB Timers */ /* CMSDK APB Timers */
#define CMSDK_APB_TIMER_0_IRQ IRQ_TIMER0 #define CMSDK_APB_TIMER_0_IRQ IRQ_TIMER0
#define CMSDK_APB_TIMER_1_IRQ IRQ_TIMER1 #define CMSDK_APB_TIMER_1_IRQ IRQ_TIMER1

4
dts/arm/v2m_beetle.dts
View file

@ -32,14 +32,14 @@
soc { soc {
uart0: uart@40004000 { uart0: uart@40004000 {
compatible = "arm,cmsdk-uart"; compatible = "arm,cmsdk-uart";
reg = <0x40004000 0x14>; reg = <0x40004000 0x1000>;
interrupts = <IRQ_UART0 3>; interrupts = <IRQ_UART0 3>;
current-speed = <115200>; current-speed = <115200>;
}; };
uart1: uart@40005000 { uart1: uart@40005000 {
compatible = "arm,cmsdk-uart"; compatible = "arm,cmsdk-uart";
reg = <0x40005000 0x14>; reg = <0x40005000 0x1000>;
interrupts = <IRQ_UART1 3>; interrupts = <IRQ_UART1 3>;
current-speed = <115200>; current-speed = <115200>;
}; };

3
dts/arm/v2m_beetle.fixup
View file

@ -1,9 +1,12 @@
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
#define CMSDK_APB_UART0 ARM_CMSDK_UART_40004000_BASE_ADDRESS_0
#define CMSDK_APB_UART_0_IRQ ARM_CMSDK_UART_40004000_IRQ_0 #define CMSDK_APB_UART_0_IRQ ARM_CMSDK_UART_40004000_IRQ_0
#define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY #define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT0_BAUD_RATE ARM_CMSDK_UART_40004000_CURRENT_SPEED #define CONFIG_UART_CMSDK_APB_PORT0_BAUD_RATE ARM_CMSDK_UART_40004000_CURRENT_SPEED
#define CMSDK_APB_UART1 ARM_CMSDK_UART_40005000_BASE_ADDRESS_0
#define CMSDK_APB_UART_1_IRQ ARM_CMSDK_UART_40005000_IRQ_0 #define CMSDK_APB_UART_1_IRQ ARM_CMSDK_UART_40005000_IRQ_0
#define CONFIG_UART_CMSDK_APB_PORT1_IRQ_PRI ARM_CMSDK_UART_40005000_IRQ_0_PRIORITY #define CONFIG_UART_CMSDK_APB_PORT1_IRQ_PRI ARM_CMSDK_UART_40005000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT1_BAUD_RATE ARM_CMSDK_UART_40005000_CURRENT_SPEED #define CONFIG_UART_CMSDK_APB_PORT1_BAUD_RATE ARM_CMSDK_UART_40005000_CURRENT_SPEED